文件名称：Altera DSP Literature
文件大小：52.22MB
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更新时间：2022-05-15 14:56:27
Altera
Part I: DSP DESIGN BUILDING BLOCKS.................................................................................................................................................................... 1 FFT MegaCore Function User Guide....................................................................................................................................................................... 3 CIC Compiler User Guide........................................................................................................................................................................................ 71 NCO Compiler User Guide...................................................................................................................................................................................... 109 FIR Compiler User Guide........................................................................................................................................................................................ 161 Reed-Solomon Compiler User Guide...................................................................................................................................................................... 247 Viterbi Compiler User Guide.................................................................................................................................................................................... 303 Video and Image Processing Suite User Guide...................................................................................................................................................... 369 AN 404: FFT/IFFT Block Floating Point Scaling...................................................................................................................................................... 475 Part II: DSP DEVELOPMENT FLOW - DSP/SOPC BUILDER..................................................................................................................................... 482 DSP Builder User Guide.......................................................................................................................................................................................... 484 DSP Builder Reference Manual............................................................................................................................................................................... 702 FPGAs Provide Reconfigurable DSP Solutions....................................................................................................................................................... 934 Part III: HARDWARE DEVELOPMENT........................................................................................................................................................................ 940 DSP Development Kit, Stratix II Edition Getting Started User Guide....................................................................................................................... 942 DSP Development Kit, Stratix & Stratix Professional Edition Getting Started User Guide...................................................................................... 970 DSP Development Kit, Cyclone II Edition Getting Started User Guide.................................................................................................................... 996 Stratix II EP2S60 DSP Development Board Data Sheet......................................................................................................................................... 1030 Stratix EP1S80 DSP Development Board Data Sheet............................................................................................................................................ 1082 Stratix EP1S25 DSP Development Board Data Sheet............................................................................................................................................ 1130 Cyclone II EP2C35 DSP Development Board Reference Manual........................................................................................................................... 1177 Stratix II EP2S180 DSP Development Board Reference Manual............................................................................................................................ 1287 Part IV: DEVICE SELECTION & ARCHITECTURE...................................................................................................................................................... 1345 DSP Blocks in Stratix & Stratix GX Devices............................................................................................................................................................ 1347 Implementing High-Performance DSP Functions in Stratix & Stratix GX Devices................................................................................................... 1375 DSP Blocks in Stratix II Devices.............................................................................................................................................................................. 1439 DSP Blocks in Stratix III Devices............................................................................................................................................................................. 1473 Stratix II DSP Performance White Paper................................................................................................................................................................. 1523 Embedded Multipliers in Cyclone II Devices............................................................................................................................................................ 1532 Part V: DSP APPLICATIONS USING FPGAS.............................................................................................................................................................. 1542 FPGAs for High-Performance DSP Applications White Paper................................................................................................................................ 1544 Implementing FFT in an FPGA Co-Processor......................................................................................................................................................... 1554 Adaptive Edge Detection for Real-Time Video Processing using FPGAs............................................................................................................... 1562 Direct Up-Conversion using an FPGA-based Polyphase Modem........................................................................................................................... 1572 Extending the Peripheral Set of DSP Processors using FPGAs.............................................................................................................................. 1579 Rapid FPGA Modem Design Techniques for SDRs using Altera DSP Builder........................................................................................................ 1585 FPGA Co-Processing Solutions for High Performance Signal Processing Applications......................................................................................... 1593 Studies on FIR Filter Pre-Emphasis for High-Speed Backplane Data Transmission............................................................................................... 1599 Enabling Real-Time JPEG2000 with FPGA Architectures....................................................................................................................................... 1607 A Simple Data Pre-Distortion Technique for Satellite Communications.................................................................................................................. 1616 Soft Multipliers For DSP Applications...................................................................................................................................................................... 1624 AN 306: Implementing Multipliers in FPGA Devices................................................................................................................................................ 1642 Using PLDs for High-Performance DSP Applications White Paper......................................................................................................................... 1690 High Performance, Low Cost FPGA Correlator for Wideband CDMA & Other Wireless Applications..................................................................... 1696 Versatile Digital QAM Modulator.............................................................................................................................................................................. 1707 Increase Bandwidth in Medical & Industrial Applications With FPGA Co-Processors White Paper........................................................................ 1715 Implementation of CORDIC-Based QRD-RLS Algorithm on Stratix with Embedded Nios Technology................................................................... 1730 Implementing an IEEE Std. 802.16-Compliant FEC Decoder White Paper............................................................................................................. 1740 Implementing OFDM Using Altera Intellectual Property White Paper...................................................................................................................... 1745 Part VI: REFERENCE DESIGNS.................................................................................................................................................................................. 1753 AN 245: Filtering Reference Design Lab................................................................................................................................................................. 1755 AN 263: CORDIC Reference Design....................................................................................................................................................................... 1789 AN 314: Digital Predistortion Reference Design...............................................................................................................................