文件名称：VHDL Programming by Example 4th Ed
文件大小：2.13MB
文件格式：PDF
更新时间：2012-08-18 13:43:00
VHDL Programming
学习VHDL的好资料！ This is the fourth version of the book and this version now not only provides VHDL language coverage but design methodology information as well. This version will guide the reader through the process of creating a VHDL design, simulating the design, synthesizing the design, placing and routing the design, using VITAL simulation to verify the final result, and a new technique called At-Speed debugging that provides extremely fast design verification. The design example in this version has been updated to reflect the new focus on the design methodology.