文件名称:VHDL 硬件相关程序设计 范例
文件大小:33KB
文件格式:RAR
更新时间:2014-09-14 04:23:38
VHDL 范例
本实例结合了众多VHDL的小程序,对VHDL程序所做的实验有很大的帮助 欢迎大家下载
【文件预览】:
VHDL 范例
----universal_register.txt(2KB)
----register_374.txt(790B)
----shft_reg_vhdl.txt(2KB)
----adder_variety_style 3.txt(3KB)
----topdown.txt(2KB)
----decoder_hct139.txt(1KB)
----multiplexer_ifelse 2.txt(852B)
----moor2.txt(3KB)
----state_variable.txt(2KB)
----d-filp-flop_hct175.txt(931B)
----hamming_encoder.txt(962B)
----adder_nbit_generate.txt(1KB)
----adder_variety_style.txt(3KB)
----multiplier_booth.txt(5KB)
----fpdiv_vhdl.txt(2KB)
----moor1.txt(3KB)
----hamming_decoder.txt(3KB)
----counter_generate.txt(2KB)
----random_generator.txt(2KB)
----程序说明.doc(20KB)
----address_decoder_m68008.txt(2KB)
----counter_pload.txt(991B)
----shift_register_164.txt(726B)
----hct245.txt(791B)
----bin2bcd.vhd.txt(1KB)
----counter_wait.txt(1KB)
----multi_vhdl.txt(3KB)
----counter_nbit.txt(928B)
----dmux_vhdl.vhd.txt(1KB)
----prebus.txt(497B)
----multiplexer_ifelse 4.txt(852B)
----multiplexer_ifelse.txt(852B)
----comparator8.txt(480B)
----bidir.txt(1KB)
----BIN2GARY_vhdl.txt(919B)
----convert.txt(878B)
----mealy1.txt(3KB)
----state_moor_mealy.txt(3KB)
----priority_encoder_highest.txt(1KB)
----ffd_vhdl.vhdl.txt(1KB)
----majority_voter.txt(2KB)
----state_classic.txt(3KB)
----State_areset.txt(1KB)
----bin27seg_vhdl.txt(2KB)
----multiplexer_ifelse 5.txt(852B)