文件名称：vhdl 16位乘法器
文件大小：7.94MB
文件格式：RAR
更新时间：2022-06-08 16:38:28
vhdl matlab
使用硬件编程语言设计了一个16位加法器 并用matlab模拟输入和输出 并对这次课程设计进行了总结 Matrix calculation is one of the fundamental mathematic calculations commonly used in advanced signal processing algorithms for a wide range of applications, such as satellite navigation systems, complex control systems and etc. In order to implement such advanced signal processing algorithms on an FPGA based embedded system, we need to use VHDL to design a matrix multiplier core for a Xilinx FPGA device.