文件名称：VHDL Coding and Logic Synthesis with Synopsys
文件大小：11.29MB
文件格式：PDF
更新时间：2013-01-07 04:22:49
VHDL Synthesis Synopsys
This book is divided into two parts. The first deals mainly with VHDL coding. Chapters 1-6 are included in the first part. In these chapters, the reader will see how simple and complex designs can be coded into synthesizable VHDL. Testbenches and timing diagrams are included to allow the reader to better understand the examples. The contents of this first part of the book will expose the reader to many examples of synthesizable code writing. In these examples, explanations and guidelines are included to give the reader an idea regarding the starting point required to write synthesizable VHDL code.