文件名称：Integrated Circuit Failure Analysis: A Guide to Preparation Techniques
文件大小：1.34MB
文件格式：CHM
更新时间：2021-10-14 09:14:32
芯片失效分析 半导体分析
With the explosive growth in the industry for highly-integrated semiconductor circuits the construction- and fault analysis for these products has become very important. It plays a key role since it helps circuit developers and technologists in their search for faults and has become indispensable for the optimization of product quality. Neither can the user of components dispense with breakdown analysis, since breakdowns enable him to obtain information about possible faults in the external circuitry or in the operating conditions. Semiconductor analysis has become a discipline in its own right. Successful work in this area requires extensive knowledge of circuits, technology, test programmes, etc. for the products concerned. A wealth of experience is just as necessary as a well-trained nose for seeking out faults. The subject area is now almost beyond the comprehension of individuals and in general, can only be covered by a team working together. One important part of semiconductor analysis involves the preparation of the object, i.e. as a rule, the opening of the package and the removal of the layers of the chip structure, or the preparation of a cross-section. Many of the procedures used for this are still wet chemical methods. However, dry etching in the plasma is becoming increasingly indispensable for modern complex technologies; it is often used in combination with wet procedures. Novices entering this area face numerous problems relating to the diverse requirements of equipping their preparatory laboratory; however, even experienced professionals must continually extend their analytical methods and adapt to new technologies. One should not lose sight of the fact that the procedures for removing material in the analysis must work no less precisely than those used in semiconductor manufacturing; this implies high investment costs.