文件名称：十进制计数器vhdl
文件大小：469B
文件格式：TXT
更新时间：2013-01-16 08:05:11
十进制计数
查看文章 VHDL十进制计数器2009-07-14 16:28library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity count10 is port (clk:in std_logic; f:buffer integer range 0 to 15; cout:out std_logic); end; architecture aa of count10 is begin process(clk) begin if falling_edge(clk) then if f=9 then f<=0; cout<='1'; else f<=f+1; end if; else null; end if; end process; end;