VHDL编写的24进制时钟

时间:2012-09-27 13:53:42
【文件属性】:

文件名称:VHDL编写的24进制时钟

文件大小:70KB

文件格式:RAR

更新时间:2012-09-27 13:53:42

vhdl 时钟

用vhdl编写的24进制时钟,能数码管显示时分秒。


【文件预览】:
shizhong.bdf
Vhdl2.vhd
shizhong.map.rpt
shizhong.flow.rpt
shizhong.sdc
shizhong.map.summary
shizhong.db_import.rpt
shizhong.vwf
shizhong.sim.rpt
count12.vhd.bak
shizhong.qpf
count12.vhd
shizhong.done
shizhong.qsf
undo_redo.txt
shizhong.asm.rpt
shizhong.tan.summary
shizhong.tan.rpt
shizhong.qws
shizhong.eda.rpt
shizhong.pof
shizhong_nativelink_simulation.rpt
shizhong.pin
counter2.bsf
shizhong.fit.summary
shizhong.sta.summary
shizhong.fit.smsg
shizhong.fit.rpt
shizhong.sof
counter12.bsf
shizhong.sta.rpt
shizhong.dpf
counter60.bsf
Vhdl2.vhd.bak
Block1.bdf
counter60.vhd.bak
counter60.vhd

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