文件名称：74hc595芯片资料
文件大小：143KB
文件格式：PDF
更新时间：2012-11-05 04:26:42
英文版资料
详细74hc595芯片资料The ’HC595 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state.