COMPUTER ORGANIZATION AND ARCHITECTURE DESIGNING FOR PERFORMANCE NINTH EDITION
Although RISC architectures have been defined and designed in a variety of
ways by different groups, the key elements shared by most designs are these:
• A large number of general-purpose registers, and/or the use of compiler
technology to optimize register usage
• A limited and simple instruction set
• An emphasis on optimizing the instruction pipeline
Table 15.1 compares several RISC and non-RISC systems.
We begin this chapter with a brief survey of some results on instruction sets,
and then examine each of the three topics just listed. This is followed by a descrip-
tion of two of the best-documented RISC designs.