如何从软件工具向Zynq的AXI-Stream发送数据？

I'm looking for a way to send some data from my software app written in C to AXI-Stream interface of Zynq. Something like

我正在寻找一种方法,将我用C语言编写的软件应用程序中的一些数据发送到Zynq的AXI-Stream接口。就像是

open(/dev/axistream);
send_data(data);

I'm running Linux on the Arm part and now I want to connect it to the programmable logic part.

我在Arm部分运行Linux,现在我想将它连接到可编程逻辑部分。

3 个解决方案

#1

On a zynq device communication between the Cortex-A9 processor and FPGA is done using AXI protocol. There are three types of ports which can be used to communicate between FPGA and CPU (Zynq TRM) :

在zynq设备上,Cortex-A9处理器和FPGA之间的通信使用AXI协议完成。有三种类型的端口可用于FPGA和CPU之间的通信(Zynq TRM):

General Purpose AXI ports: 2x Master (from CPU to FPGA) and 2x Slave port (from FPGA to CPU). these ports are connected to the central interconnect of the processing system and can be used to transfer data to/from DDR memory or on-chip memory (OCM).

通用AXI端口:2x主机(从CPU到FPGA)和2x从机端口(从FPGA到CPU)。这些端口连接到处理系统的*互连,可用于向/从DDR存储器或片上存储器(OCM)传输数据。

High Performance AXI ports: 4x Slave port (from FPGA to CPU) provide high-bandwidith access to DDR or OCM

高性能AXI端口:4x从端口(从FPGA到CPU)提供对DDR或OCM的高带宽访问

ACP (Accelerator Coherency Port): Slave port (from FPGA to CPU) high-troughput port connected directly to the snoop control unit (SCU). The SCU maintains cache coherency (ommits the need for cache flush/invalidates).

ACP(加速器一致性端口):从端口(从FPGA到CPU)高端输出端口直接连接到监听控制单元(SCU)。 SCU维护缓存一致性(省略缓存刷新/无效的需要)。

From your question, I would understand that in your case the CPU is the Master of the communication. You will need to use the General-Purpose axi master ports. You cannot connect an AXI4 streaming interface to the AXI interconnect. You will need to convert AXI4 Streaming to AXI. Depending on your performance needs an AXI DMA ip core (AXI DMA IP core) might be a good solution.

从你的问题,我会理解,在你的情况下,CPU是沟通的主人。您将需要使用通用轴axi主端口。您无法将AXI4流接口连接到AXI互连。您需要将AXI4 Streaming转换为AXI。根据您的性能需求,AXI DMA IP内核(AXI DMA IP内核)可能是一个很好的解决方案。

If you want to communicate from software point of view using "open(/dev/)" you will need a Linux device driver. If you are using the DMA core your communication will typically look like this:

如果您想使用“open(/ dev /)”从软件的角度进行通信,则需要Linux设备驱动程序。如果您使用DMA核心,您的通信通常如下所示:

You will configure the DMA core to fetch data from a certain memory address

您将配置DMA内核以从某个内存地址获取数据

Start the DMA core

启动DMA核心

the DMA core will fetch the data and feed it to the AXI4 streaming interface of your IP block

DMA内核将获取数据并将其提供给IP块的AXI4流接口

Your IP block will do some operation on the data and send back to memory (using DMA) or do something else (send to external interface, ...)

您的IP块将对数据执行一些操作并发送回内存(使用DMA)或执行其他操作(发送到外部接口,...)

The register set of your DMA core will be memory mapped and accessible through you own linux device driver. For debugging purposes i would suggest using mmap to access the registers and quickly validate the operations of your hardware. Once you go for the linux kernel device driver i would suggest you reading this book: Linux Device Drivers 3the edition

您的DMA内核的寄存器集将被内存映射,并可通过您自己的Linux设备驱动程序访问。出于调试目的,我建议使用mmap访问寄存器并快速验证硬件的操作。一旦你去了linux内核设备驱动程序,我建议你阅读这本书:Linux设备驱动程序3版本

#2

The best choice for efficient data transfer is using DMA enabled PS-PL communication. After implementing a DMA controller inside PL, such as AXI CDMA you can connect it to an AXI4-Stream IP then to your desired IP core. If your not going to set up a general framework you can access DMA-enabled part of DDR memory using mmap() system call. Here is a template to transfer data from user space to the IP core in which a loop-back is implemented. https://github.com/h-nasiri/Zynq-Linux-DMA Zynq AXI CDMA

高效数据传输的最佳选择是使用支持DMA的PS-PL通信。在PL内部实现DMA控制器后,例如AXI CDMA,您可以将其连接到AXI4-Stream IP,然后连接到您想要的IP内核。如果您不打算设置通用框架,可以使用mmap()系统调用访问支持DMA的DDR内存部分。这是一个将数据从用户空间传输到IP核的模板,其中实现了环回。 https://github.com/h-nasiri/Zynq-Linux-DMA Zynq AXI CDMA

The AXI CDMA uses processing system HP slave port to get read/write access of DDR system memory. There is also a Linux OS based application software that uses mmap() to initialize the DMA core and then do the data transfer. You can easily add an AXI4-Stream interconnect to the AXI CDMA and connect

AXI CDMA使用处理系统HP从端口来获得DDR系统存储器的读/写访问。还有一个基于Linux OS的应用软件,它使用mmap()初始化DMA内核,然后进行数据传输。您可以轻松地将AXI4-Stream互连添加到AXI CDMA并进行连接

#3

If I understand correctly, you want to DMA data from the from the PS to PL using the DMA engine. In that case, you would need to write a driver in Linux which will either use the AXI DMA engine driver, or configure the DMA engine from user space.

如果我理解正确,您希望使用DMA引擎将数据从PS传输到PL。在这种情况下,您需要在Linux中编写一个驱动程序,它将使用AXI DMA引擎驱动程序,或者从用户空间配置DMA引擎。

Is that what you are looking for?

这是你在找什么?

#1