基于Verilog的七段数码管显示模块

时间:2025-02-12 07:09:53

该模块用与一位七段数码管显示0-9,当位数超过一位时可用数位转换模块提取出“个”,“十”,“百”三位按位显示。

//七段数码管模块
module seven_seg(num1,data1);
input [3:0]num1;
output [6:0]data1;
reg [6:0]data1;
always@(num1) begin
case (num1)
        4'd0: begin data1 = 7'b1000000;  end
		4'd1: begin data1 = 7'b1111001; end
		4'd2: begin data1= 7'b0100100; end
		4'd3: begin data1 = 7'b0110000; end
		4'd4: begin data1 = 7'b0011001;  end
		4'd5: begin data1 = 7'b0010010;  end
		4'd6: begin data1 = 7'b0000010;  end
		4'd7: begin data1 = 7'b1111000; end
		4'd8: begin data1 = 7'b0000000;  end
		4'd9: begin data1 = 7'b0010000; end
        default: begin data1 = 7'b0000001; end
endcase
end
endmodule

数位转换模块,用于将整数的个位,十位,百位分别提取,用于数码管显示。

//数位转换模块
module Multiplier_out(
    sumin,//整数输入
    ge,//个位输出
    shi,//十位输出
    bai,//百位输出
);
input [7:0]sumin;
output [3:0]ge,shi,bai;
reg [3:0]ge,shi,bai;
always@(sumin) begin
    bai=sumin/100;//百位
    shi=(sumin-bai*100)/10;//十位
    ge=sumin-bai*100-shi*10;//个位
end
endmodule