[C语言][Make]对makefile中 $+ 与 $^ 的理解

啥也别说了，上例子：

foo: foo1.bar foo2.bar
    echo $+ 

foo1.bar: 
    echo "foo1"

foo2.bar: 
    echo "foo2"

输出为：

foo1

foo2

foo1.bar foo2.bar  

改变为：

foo: foo1.bar foo2.bar foo2.bar
    echo $+
    echo $^
foo1.bar:
    echo "foo1"

foo2.bar: 
    echo "foo2"

foo3.bar:
    echo "foo3"

输出为：

foo1

foo2

foo1.bar foo2.bar foo2.bar

foo1.bar foo2.bar

也就是说，

对 $+而言，就是将 前提条件中的内容原样输出

对 $^ 而言，前提条件中的内容输出是，要过滤掉重复的部分。

$^    The names of all the prerequisites, with spaces between them. For prerequisites which are archive members, only the member named is used (see Archives). A target has only one prerequisite on each other file it depends on, no matter how many times each file is listed as a prerequisite. So if you list a prerequisite more than once for a target, the value of $^ contains just one copy of the name. This list does not contain any of the order-only prerequisites; for those see the `$|' variable, below.

$+    This is like `$^', but prerequisites listed more than once are duplicated in the order they were listed in the makefile. This is primarily useful for use in linking commands where it is meaningful to repeat library file names in a particular order

说法真的是很怪异，话让他们给倒过来说，很别扭。

其实不是 duplicated ，而是 $^ 作了点额外工作，清除了多余部分。

 后文待续