文件名称：Vivado高层综合简介
文件大小：11.52MB
文件格式：PDF
更新时间：2017-07-03 05:19:38
Vivado
The Xilinx® High-Level Synthesis software Vivado® HLS transforms a C specification into a Register Transfer Level (RTL) implementation that synthesizes into a Xilinx Field Programmable Gate Array (FPGA). You can write C specifications in C, C++ or SystemC.