文件名称：Wafer Scale Integration
文件大小：1.48MB
文件格式：PDF
更新时间：2022-03-09 04:26:59
Wafer Scale
Wafer Scale Integration project paper. Abstract-In this paper we outline some of the technology, successful and unsuccessful, of part of a large European project in wafer scale integration (WSI). The work described is an attempt to build a 64 by 64 array processor on a 4-in wafer. Such a processor would have a computing power in excess of 10 billion operations per second. A test chip and a demonstration system, which achieves such a processing power, is also outlined