【文件属性】：
文件名称：AD9510使用手册
文件大小：597KB
文件格式：PDF
更新时间：2022-04-09 10:09:25
AD9510
FEATURES
Low phase noise phase-locked loop core
Reference input frequencies to 250 MHz
Programmable dual-modulus prescaler
Programmable charge pump (CP) current
Separate CP supply (VCP S ) extends tuning range
Two 1.6 GHz, differential clock inputs
8 programmable dividers, 1 to 32, all integers
Phase select for output-to-output coarse delay adjust
4 independent 1.2 GHz LVPECL outputs
Additive output jitter 225 fs rms
4 independent 800 MHz/250 MHz LVDS/CMOS clock outputs
Additive output jitter 275 fs rms
Fine delay adjust on 2 LVDS/CMOS outputs
Serial control port
Space-saving 64-lead LFCSP