文件名称：AD9852技术资料
文件大小：994KB
文件格式：PDF
更新时间：2012-11-27 02:26:43
9852
FEATURES 300 MHz Internal Clock Rate FSK, BPSK, PSK, CHIRP, AM Operation Dual Integrated 12-Bit D/A Converters Ultrahigh-Speed Comparator, 3 ps RMS Jitter Excellent Dynamic Performance: 80 dB SFDR @ 100 MHz (1 MHz) AOUT 4 to 20 Programmable Reference Clock Multiplier Dual 48-Bit Programmable Frequency Registers Dual 14-Bit Programmable Phase Offset Registers 12-Bit Amplitude Modulation and Programmable Shaped On/Off Keying Function Single Pin FSK and BPSK Data Interface PSK Capability Via I/O Interface Linear or Nonlinear FM Chirp Functions with Single Pin Frequency “Hold” Function Frequency-Ramped FSK <25 ps RMS Total Jitter in Clock Generator Mode Automatic Bidirectional Frequency Sweeping SIN(x)/x Correction Simplified Control Interface 10 MHz Serial, 2-Wire or 3-Wire SPI-Compatible or 100 MHz Parallel 8-Bit Programming