文件名称：TRI 5000 数字电路测试（类比测试）
文件大小：494KB
文件格式：PDF
更新时间：2012-08-23 04:39:58
数字电路测试（类比测试）
C-2數位元件測試原理.........................................................................................3 C-2-1 TTL邏輯閘測試原理(TTL Logic Test Theorem)..................................3 C-2-1-1 輸入及輸出順序(Input and Output Sequence).........................3 C-2-1-2 GROUP 設定技巧....................................................................4 C-2-2 Tree-Chain 測試原理.........................................................................4 C-2-2-1 測試命令執行動作....................................................................5 C-2-2-2 Tree Chain 測試演算法(Tree Chain Test Algorithm).................6 C-2-3 Memory 測試原理..............................................................................6 C-2-3-1 Walking one for Address bus....................................................7 C-2-3-2 Walking zero for Address bus...................................................8 C-2-3-3 Data bus...................................................................................8 C-2-4 I2C 基本概念......................................................................................9 C-2-5 P2C 基本概念..................................................................................12 C-2-6 Boundary-Scan測試原理.................................................................13 C-2-6-1 Boundary-Scan 基本概念......................................................13 C-2-6-2 Boundary-Scan 測試原理......................................................14 C-2-7 快閃記憶體(Flash Memory)測試原理...............................................19 C-2-8 MWIRE Serial EEPROM基本概念...................................................20 C-2-9 ISP 測試原理...................................................................................20 C-2-10 SPI Serial Memory基本概念..........................................................20 Better