图像配准SIFT FPGA实现

【文件属性】：
文件名称：图像配准SIFT FPGA实现
文件大小：6.49MB
文件格式：ZIP
更新时间：2022-11-05 04:53:04
SIFT FPGA An entire optimised SIFT algorithm has been proposed for FPGA based real-time image matching applications in this paper. Not only has the corresponding software model been built up, but the key part of the optimized SIFT algorithm,which is the SIFT feature detection module, has also been implemented on a Xilinx Virtex-5 FPGA. It has been confirmed from the standard test that our SIFT feature detection module is able to extract features from a typical image of 640x480 pixels with 31 ms, which is faster than any existing systems. It can be seen from the matching performance comparison that our optimized SIFT algorithm has achieved a similar level to SURF, which is one of the well recognized image matching algorithms.

【文件预览】：
图像配准
----An Architecture of Optimised SIFT Feature.pdf(742KB)
----+++基于SIFT算法图像配准的FPGA实现_高聪.caj(7.6MB)