文件名称：Quartus Video and Image Processing Suite User Guide
文件大小：2.78MB
文件格式：PDF
更新时间：2022-05-15 14:35:38
quartu
Intel®'s Video and Image Processing (VIP) Suite IP cores are available in the DSP library of the Intel Quartus® Prime software and may be configured to the required number of bits per symbols, symbols per pixel, symbols in sequence or parallel and pixels in parallel. The VIP Suite offers the following IP cores: • 2D FIR II Intel FPGA IP • Avalon-ST Video Monitor Intel FPGA IP (Available only in Platform Designer (Standard) edition) • Avalon-ST Video Stream Cleaner Intel FPGA IP • Chroma Resampler II Intel FPGA IP • Clipper II Intel FPGA IP • Clocked Video Input II Intel FPGA IP • Clocked Video Input Intel FPGA IP (Available only in Platform Designer (Standard) edition) • Clocked Video Output II Intel FPGA IP • Clocked Video Output Intel FPGA IP (Available only in Platform Designer (Standard) edition) • Color Plane Sequencer II Intel FPGA IP • Color Space Converter II Intel FPGA IP • Configurable Guard Bands Intel FPGA IP • Control Synchronizer Intel FPGA IP (Available only in Platform Designer (Standard) edition) • Deinterlacer II Intel FPGA IP • Frame Buffer II Intel FPGA IP • Gamma Corrector II Intel FPGA IP • Interlacer II Intel FPGA IP • Mixer II Intel FPGA IP • Scaler II Intel FPGA IP • Switch II Intel FPGA IP • Test Pattern Generator II Intel FPGA IP • Trace System Intel FPGA IP (Available only in Platform Designer (Standard) edition)