文件名称：PCI Express PHY PCB Layout Guideline
文件大小：200KB
文件格式：PDF
更新时间：2013-09-08 10:10:26
PCI express layout
1. Introduction 2. PCI Express interconnection 2.1 PCB stackup and reference planes 2.2 Traces 2.2.1 Impedance 2.2.2 Width and spacing 2.2.3 Length and length matching 2.2.4 Bends 2.3 Breakout areas 2.4 Test points, vias and pads 2.5 AC coupling capacitors 2.6 Edge fingers and connector 2.7 Reference clock 3. PXPIPE interface connection 3.1 SSTL_2 termination 3.2 Length matching of data bus route traces 4. Summary 5. References 6. Disclaimers 7. Trademarks 8. Contents