文件名称：Understanding MIPI Techtronix
文件大小：5.34MB
文件格式：PDF
更新时间：2021-10-28 18:32:27
D-PHY CSI DSI
The MIPI Alliance defines D-PHY as a re-usable, scalable physical layer for interfacing various components such as cameras and displays to baseband processors in next generation smartphones, tablets, and other portable devices. Unlike many of the existing interfaces, D-PHY is unique because it can switch between differential (High Speed) and single-ended (Low Power) mode in real time depending on the need to transfer large amounts of data or to conserve power to prolong the battery life. The D-PHY interface is capable of operating in simplex or duplex configuration with single data lane or multiple data lanes, giving a flexibility to avail the links as needed. In addition, clock is always uni-directional (Master to Slave) and is in quadrature phase with data.