文件名称：Using Large CPLDs and FPGAs for Prototyping and VGA Video Display Generation in Computer Architecture Design Laboratories
文件大小：50KB
文件格式：PDF
更新时间：2013-02-16 04:11:23
FPGA CPLD VGA Design
This paper describes current work utilizing a rapid prototyping approach to simulate,ynthesize, and implement prototype digital system and computer architectures using PCs with student versions of commercial VHDL based CAD tools and a low cost board with a large CPLD or FPGA. VGA video output generated directly by the CPLD chip is used to display graphics or textual data eliminating the need for a logic analyzer. This low cost methodology is utilized in the design laboratory sequence of required courses for computer engineering students at Georgia Tech.