文件名称：Virtex-5手册 Xilinx 英文版
文件大小：13.21MB
文件格式：PDF
更新时间：2014-03-21 12:21:17
FPGA Virtex-5
Chapter 1: Clock Resources Chapter 2: Clock Management Technology Chapter 3: Phase-Locked Loops (PLLs) Chapter 4: Block RAM Chapter 5: Configurable Logic Blocks (CLBs) Chapter 6: SelectIO Resources Chapter 7: SelectIO Logic Resources Chapter 8: Advanced SelectIO Logic Resources Index .