文件名称：串行解串器(SerDes)的四种不同架构和应用
文件大小：606KB
文件格式：PDF
更新时间：2015-05-05 15:08:43
SerDes 8b/10b
When most system designers look at serializer/deserializer (SerDes) devices, they often compare speed and power without considering how the SerDes works and what it actually does with their data. Internal SerDes architecture may seem irrelevant, but this overlooked item can dictate many important system parameters like system topology, protocol overhead, data formatting and flow, latency, clocking and timing requirements, and the need for additional buffering as well as logic. These issues can have a big impact on system cost, performance, and efficiency.