Synetgy_ Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs 时间:2022-08-09 08:44:21 【文件属性】: 文件名称:Synetgy_ Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs 文件大小:925KB 文件格式:PDF 更新时间:2022-08-09 08:44:21 FPGA Deeplearning 2019年FPGA会议 通过FPGA硬件加速实现深度学习,卷积神经网络 立即下载