Digital Computer Arithmetic Datapath Design Using Verilog HDL

时间:2015-11-16 19:30:47
【文件属性】:

文件名称:Digital Computer Arithmetic Datapath Design Using Verilog HDL

文件大小:617KB

文件格式:PDF

更新时间:2015-11-16 19:30:47

Digital Computer Arithmetic Design Verilog

The role of arithmetic in datapath design in VLSI design has been increasing in importance over the last several years due to the demand for processors that are smaller, faster, and dissipate less power. Unfortunately, this means that many of these datapaths will be complex both algorithmically and circuitwise. As the complexity of the chips increases, less importance will be placed on understanding how a particular arithmetic datapath design is implemented and more importance will be given to when a product will be placed on the market. This is because many tools that are available today, are automated to help the digital system designer maximize their efficiently. Unfortunately, this may lead to problems when implementing particular datapaths.


网友评论

  • 喜欢这种有代码 有真值表达式 有网表示意图的文档,很不错