文件名称：松翰8位普通功能 单片机 SN8P2511
文件大小：2.07MB
文件格式：PDF
更新时间：2015-07-16 15:12:07
松翰8位普通功能 单片机 SN8P2511 2501B 2501C
1.1 FEATURES Features Selection Table CHIP ROM RAM Stack Timer I/O IHRC PWM Buzzer Wake-up Pin No. Package T0 TC0 SN8P2501B 1K 48 4 V V 12 V 1 1 5 DIP14/SOP14/SSOP16 SN8P2511 1K 48 4 V V 12 V 1 1 5 DIP14/SOP14/SSOP16 Memory configuration Fcpu (Instruction cycle) ROM size: 1K * 16 bits. Fcpu = Fosc/1, Fosc/2, Fosc/4, Fosc/8, Fosc/16. RAM size: 48 * 8 bits. One 8-bit basic timer with RTC (0.5Sec). 4 levels stack buffer. One 8-bit timer with external event counter, Buzzer and PWM. (TC0). 3 interrupt sources 2 internal interrupts: T0, TC0 On chip watchdog timer and clock source is 1 external interrupt: INT0 Internal low clock RC type (16KHz(3V), 32KHz(5V)) I/O pin configuration Four system clocks Bi-directional: P0, P1, P2, P5. External high clock: RC type up to 10 MHz Wakeup: P0, P1 level change. External high clock: Crystal type up to 16 MHz Pull-up resisters: P0, P1, P2, P5. Internal high clock: 16MHz RC type Input only: P1.1 Internal low clock: RC type 16KHz(3V), 32KHz(5V) Programmable open-drain: P1.0 External interrupt: P0.0 (PEDGE edge trigger) Four operating modes Normal mode: Both high and low clock active 3-Level LVD. Slow mode: Low clock only. Reset system and power monitor. Sleep mode: Both high and low clock stop Green mode: Periodical wakeup by T0 timer Powerful instructions Instruction’s length is one word. Package (Chip form support) Most of instructions are one cycle only. DIP 14 pin All ROM area JMP/CALL instruction. SOP 14 pin All ROM area lookup table function (MOVC). SSOP 16 pin