文件名称：s3c2451 manual
文件大小：4.19MB
文件格式：PDF
更新时间：2016-01-10 17:24:43
s3c2451
This user’s manual describes SAMSUNG's S3C2451 16/32-bit RISC microprocessor. SAMSUNG’s S3C2451 is designed to provide hand-held devices and general applications with low-power, and high-performance microcontroller solution in small die size. To reduce total system cost, the S3C2451 includes the following components. The S3C2451 is developed with ARM926EJ core, 65nm CMOS standard cells and a memory complier. Its lowpower, simple, elegant and fully static design is particularly suitable for cost- and power-sensitive applications. It adopts a new bus architecture known as Advanced Micro controller Bus Architecture (AMBA). The S3C2451 offers outstanding features with its CPU core, a 16/32-bit ARM926EJ RISC processor designed by Advanced RISC Machines, Ltd. The ARM926EJ implements MMU, AMBA BUS, and Harvard cache architecture with separate 16KB instruction and 16KB data caches, each with an 8-word line length.