FPGA.Design.Best.Practices.for.Team-based.Reuse.33191792

时间:2018-08-10 12:08:19
【文件属性】:

文件名称:FPGA.Design.Best.Practices.for.Team-based.Reuse.33191792

文件大小:8.73MB

文件格式:PDF

更新时间:2018-08-10 12:08:19

FPGA Design Best Practices

This book describes best practices for successful FPGA design. It is the result of the author’s meetings with hundreds of customers on the challenges facing each of their FPGA design teams. By gaining an understanding into their design environments, processes, what works and what does not work, key areas of concern in implementing system designs have been identified and a recommended design methodology to overcome these challenges has been developed. This book’s content has a strong focus on design teams that are spread across sites. The goal being to increase the productivity of FPGA design teams by establishing a common methodology across design teams; enabling the exchange of design blocks across teams. Coverage includes the complete FPGA design flow, from the basics to advanced techniques. This new edition has been enhanced to include new sections on System modeling, embedded design and high level design. The original sections on Design Environment, RTL design and timing closure have all been expanded to include more up to date techniques as well as providing more extensive scripts and RTL code that can be reused by readers. Presents complete, field-tested methodology for FPGA design, focused on reuse across design teams; Offers best practices for FPGA timing closure, in-system debug, and board design; Details techniques to resolve common pitfalls in designing with FPGAs. Table of Contents Chapter 1: Introduction Chapter 2: Project Management Chapter 3: Design Specification Chapter 4: System Modeling Chapter 5: Resource Scoping Chapter 6: Design Environment Chapter 7: Board Design Chapter 8: Power and Thermal Analysis Chapter 9: Team Based Design Flow Chapter 10: RTL Design Chapter 11: IP and Design Reuse Chapter 12: Embedded Design Chapter 13: Functional Verification Chapter 14: Timing Closure Chapter 15: High Level Design Chapter 16: In-System Debug Chapter 17: Design Sign-off


网友评论

  • 很好,谢谢分享!