文件名称：MIPS32® 74KTM Processor Core Family Software User’s Manual
文件大小：3.9MB
文件格式：PDF
更新时间：2021-12-09 17:20:05
mips
Chapter 1: Introduction to the MIPS32® 74KTM Core Family ............................................................ 23 1.1: 74KTM Core Features................................................................................................................................. 24 1.1.1: Pipeline ............................................................................................................................................ 24 1.1.2: Instruction Set .................................................................................................................................. 25 1.1.3: Memory Management, Caches, and Scratchpad Memory............................................................... 26 1.1.4: Interfaces ......................................................................................................................................... 27 1.1.5: Power Control .................................................................................................................................. 27 1.1.6: Debug............................................................................................................................................... 27 1.1.7: Other ................................................................................................................................................ 28 1.2: 74KTM Core Block Diagram ....................................................................................................................... 28 1.2.1: Instruction Fetch Unit (IFU) .............................................................................................................. 30 1.2.2: Instruction Cache ............................................................................................................................. 30 1.2.3: Instruction Decode/Dispatch Unit (IDU) ........................................................................................... 30 1.2.4: Instruction Execution Unit (IEU) ....................................................................................................... 31 1.2.5: Multiply Divide Unit (MDU) ............................................................................................................... 31 1.2.6: CorExtend® User Defined Instructions (UDIs)................................................................................. 32 1.2.7: Load Store Unit (LSU)...................................................................................................................... 32 1.2.8: System Control Coprocessor (CP0)................................................................................................. 32 1.2.9: Memory Management Unit (MMU)................................................................................................... 32 1.2.10: Data Cache .................................................................................................................................... 33 1.2.11: Scratchpad RAM ............................................................................................................................ 33 1.2.12: Graduation Unit (GRU)................................................................................................................... 33 1.2.13: Bus Interface Unit (BIU) ................................................................................................................. 34 1.2.14: Coprocessor Interface Unit (CIU)................................................................................................... 34 1.2.15: Power Management ....................................................................................................................... 34 1.2.16: EJTAG Debug ................................................................................................................................ 34