IEEE Standard Verilog Hardware Description Language

时间:2013-06-20 04:10:25
【文件属性】:

文件名称:IEEE Standard Verilog Hardware Description Language

文件大小:4.28MB

文件格式:PDF

更新时间:2013-06-20 04:10:25

HDL PLI Verilog ieee1364-2001

The Verilog Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification,synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.


网友评论

  • 版本比较旧
  • 新手读起来很有难度
  • 还不错,可以作为一个好的参考
  • 原版的Verilog标准,主流的2001版本标准,带目录。十分不错。
  • 学习verilog必备的参考书,不错
  • 原版FPGA标准,很不错,谢谢分享资料
  • 很好的东西 原版的
  • 好东西,是原版的。
  • 原版手册,不错
  • 并不是最新的版本啊。