文件名称：高性能DDR2 SDRAM接口设计
文件大小：397KB
文件格式：PDF
更新时间：2013-02-26 18:50:24
High-Performance DDR2 SDRAM Interface
This application note describes a data capture technique for a high-performance DDR2 SDRAM interface. This technique uses the Input Serializer/Deserializer (ISERDES) and Output Serializer/Deserializer (OSERDES) features available in every Virtex®-4 FPGA I/O