文件名称：基于EDA数字钟设计报告
文件大小：2.16MB
文件格式：DOC
更新时间：2012-01-13 04:30:23
EDA 数字钟
1题目分析 1.1 设计要求（数字钟的功能） （1）具有秒、分、时技术显示功能，且以24小时循环计时； （2）具有清零功，且能调时、调分； （3）具有整点报警功能，并且在报警过程中能中断报警。 根据以上功能要求，可设计以下的功能方块图: 1.2功能要求分析 根据以上数字钟的功能要求，需要完成以下几个部分: (1)时钟模块：由试验箱内部时钟提供，对计数器提供计数时钟信号； (2)秒钟模块：对秒进行60进制循环计数，并向分钟产生进位，同时具有调分功能； (3)分钟模块：对分进行60进制循环计数，并向小时产生进位，同时具有调时功能 (4)小时模块：对小时进行24进制循环计数。 (5)报警模块：在整点时报警，持续10秒钟，在报警过程钟可以中断。 1、模块一 SECOND LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY SECOND IS PORT (CLK: IN STD_LOGIC; --系统时钟信号 RESET:IN STD_LOGIC; --系统复位信号 SETMIN:IN STD_LOGIC; --分设置信号 ENMIN: OUT STD_LOGIC; --分计数时钟信号 DAOUT: OUT STD_LOGIC_VECTOR(6 DOWNTO 0)); --秒计数值 END ENTITY SECOND; ARCHITECTURE ART OF SECOND IS SIGNAL COUNT :STD_LOGIC_VECTOR(6 DOWNTO 0); SIGNAL ENMIN_1,ENMIN_2:STD_LOGIC; BEGIN DAOUT<=COUNT; ENMIN_2<=(SETMIN AND CLK); ENMIN<=(ENMIN_1 OR ENMIN_2); PROCESS(CLK,RESET,SETMIN) BEGIN IF (RESET='0')THEN COUNT<="0000000"; ENMIN_1<='0'; ELSIF(CLK'EVENT AND CLK='1')THEN IF(COUNT(3 DOWNTO 0)="1001")THEN IF(COUNT<16#60#)THEN IF(COUNT="1011001")THEN ENMIN_1<='1'; COUNT<="0000000"; ELSE COUNT<=COUNT+7; END IF; ELSE COUNT<="0000000"; END IF; ELSIF(COUNT<16#60#)THEN COUNT<=COUNT+1; ENMIN_1<='0'; ELSE COUNT<="0000000"; ENMIN_1<='0'; END IF; END IF; END PROCESS; END ART; 2、模块二 MINUTE LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY MINUTE IS PORT (CLK: IN STD_LOGIC; --分计数时钟信号 CLKS: IN STD_LOGIC; --时设置时钟信号 RESET: IN STD_LOGIC; --系统复位信号 SETHOUR:IN STD_LOGIC; --时设置信号 ENHOUR: OUT STD_LOGIC; --时计数时钟信号 DAOUT: OUT STD_LOGIC_VECTOR(6 DOWNTO 0)); --分计数值 END ENTITY MINUTE; ARCHITECTURE ART OF MINUTE IS SIGNAL COUNT :STD_LOGIC_VECTOR(6 DOWNTO 0); SIGNAL ENHOUR_1,ENHOUR_2:STD_LOGIC; BEGIN DAOUT<=COUNT; ENHOUR_2<=(SETHOUR AND CLKS); ENHOUR<=(ENHOUR_1 OR ENHOUR_2); PROCESS(CLK,RESET,SETHOUR) BEGIN IF (RESET='0')THEN COUNT<="0000000"; ENHOUR_1<='0'; ELSIF(CLK'EVENT AND CLK='1')THEN IF(COUNT(3 DOWNTO 0)="1001")THEN IF(COUNT<16#60#)THEN IF(COUNT="1011001")THEN ENHOUR_1<='1'; COUNT<="0000000"; ELSE COUNT<=COUNT+7; ENHOUR_1<='0'; END IF; ELSE COUNT<="0000000"; END IF; ELSIF(COUNT<16#60#)THEN COUNT<=COUNT+1; ENHOUR_1<='0' AFTER 100 NS; ELSE COUNT<="0000000";ENHOUR_1<='0'; END IF; END IF; END PROCESS; END ART; 3、模块三 HOUR LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY HOUR IS PORT (CLK: IN STD_LOGIC; --时计数时钟信号 RESET: IN STD_LOGIC; --系统复位信号 DAOUT: OUT STD_LOGIC_VECTOR(5 DOWNTO 0)); --时计数值 END ENTITY HOUR; ARCHITECTURE ZRT OF HOUR IS SIGNAL COUNT :STD_LOGIC_VECTOR(5 DOWNTO 0); BEGIN DAOUT<=COUNT; PROCESS(CLK,RESET) BEGIN IF (RESET='0')THEN COUNT<="000000"; ELSIF(CLK'EVENT AND CLK='1')THEN IF(COUNT(3 DOWNTO 0)="1001")THEN IF(COUNT<16#23#)THEN COUNT<=COUNT+7; ELSE COUNT<="000000"; END IF; ELSIF(COUNT<16#23#)THEN COUNT<=COUNT+1; ELSE COUNT<="000000"; END IF; END IF; END PROCESS; END ZRT; 4、模块四 ALERT LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY ALERT IS PORT (CLK,CLK1,RESET,STOP: IN STD_LOGIC; DAINM: IN STD_LOGIC_VECTOR(6 DOWNTO 0); --分计数值 DAINS: IN STD_LOGIC_VECTOR(6 DOWNTO 0); --秒计数值 SPEAK: OUT STD_LOGIC); --声音报警 END ALERT; ARCHITECTURE ART OF ALERT IS SIGNAL S_SPEAK : STD_LOGIC; SIGNAL ENSPEAK :STD_LOGIC; BEGIN SPEAK<=ENSPEAK AND S_SPEAK; PROCESS(CLK1,RESET) BEGIN IF (RESET='0')THEN S_SPEAK<='0'; ELSIF(CLK1'EVENT AND CLK1='1')THEN IF(DAINM="0000000")THEN IF(DAINS<="0010000"AND DAINS>"0000000")THEN S_SPEAK<=CLK; ELSE S_SPEAK<='0'; END IF; ELSE S_SPEAK<='0'; END IF; END IF; END PROCESS; PROCESS(STOP,RESET,DAINS) BEGIN IF(RESET<='0' OR DAINS>"0010000")THEN ENSPEAK<='1'; ELSIF(STOP'EVENT AND STOP='1') THEN ENSPEAK<='0'; END IF; END PROCESS; END ART;