VPX标准规范之一/ VITA46.0 Draft Standard

时间:2013-03-15 10:23:28
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文件名称:VPX标准规范之一/ VITA46.0 Draft Standard

文件大小:1.35MB

文件格式:PDF

更新时间:2013-03-15 10:23:28

VITA46.0 Draft Standard

Abstract This standard describes VITA 46.0 Advanced Module Format for VMEbus systems, an evolutionary step forward for the provision of high-speed interconnects in harsh-environment applications. Foreword VME has been the de-facto bus standard for Commercial off the Shelf ( COTS ) Circuit Card Assemblies since the 1980’s. VME boards have proven to be remarkably capable of evolving to support newer technologies with innovations such as VME Subsystem Bus, PCI Mezzanine Cards (PMC’s) and VME320. However, advances in technologies, appearing particularly in interconnects, have demonstrated the need for an advance in system development. This advance needs to accommodate high speed interconnect, particularly serial interconnects, and higher power delivery in concert with better heat removal. This draft standard addresses these needs in the context of IEEE 1101 form factor modules. Other specifications may address alternate outlines, such as VITA-48 (Draft). Because electronics miniaturization is driving the plug-in module I/O count, most system interconnects will need:  Multi-gigabit differential technology  Core computing cluster switched fabrics  Serial RapidIO, PCI Express, Advanced Switching Interconnect  Sufficient ports to enable distributed switching or centralized switching The plethora of high-speed interfaces available for tomorrow’s plug-in modules:  Network interfaces (Fibre Channel, 10 GbE XAUI, Infiniband…,)  Digital video (TMDS, PanelLink, OpenLDI…)  Mass storage interface (Fibre Channel, Serial ATA…,)  FPGA-based inter-board connections (e.g. Xilinx RocketIO)  Custom sensor interfaces VITA 46 provides an evolutionary roadmap for VME users:  To leverage the broad spectrum of high-speed interconnect technologies  Backward compatibility with VME bus electrical, software and selected mechanicals  Enables heterogeneous architectures which preserve existing investments in COTS-based systems  Addresses both 3U and 6U form factors with commonality  Harsh environment fit ‘designed-in’ up front in the standard  Rugged air or conduction-cooled form factors  High value placed on rear-panel I/O  High-speed connector survivability/compliance


网友评论

  • 有点太老了 2005年的版本
  • 很好很强大,结构工程师说很有用
  • 下载到我的资源中的资料要如何拷贝,谁知道,对于我来说,无法将资料拷贝进入单位局域网,没法使用啊
  • 很实用的可pcb设计的参考,推荐。 .
  • 嗯好,就是不大全
  • 正在学习,可用于pcb设计 .
  • 正在学习,可用于pcb设计
  • 纯是基于爱好才看的,很受教!
  • 一向第一时间寻求CSDN的资源,果然给力,好东西
  • 很好,找了很久了,果然CSDN资料还是很多的,正在学习中
  • 找了好久,谢谢,如果能够有其他的版本就好了
  • 找了好久,虽然是draft的协议,还是感谢楼主分享
  • 东西还不错,不过要是协议全的话就更好了
  • 基本信息还是很全的
  • 谢谢,正在按标准学习中。
  • 很好,对硬件的设计很有指导意义
  • 非常实用,要有完整的更好了
  • 不具体开发,作为应用指导也够用了。
  • 好东西,待仔细研读。
  • 对设计有帮助 谢谢分享
  • 虽然协议不清楚,但是还能获取一些基本信息的,要是VITA46其他的补充协议就好了,多谢!
  • 还不错,就是只有一部分内容,不全面
  • 比较好,对于做硬件的来说完全可以用了
  • 有完成的信号pin定义,以及PCB定义。谢谢分享。
  • 不错,不过是草稿,但也有参考价值