文件名称:Design of Low-Power Coarse-Grained Reconfigurable Architectures
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更新时间:2014-07-26 09:23:09
Low-Power Coarse-Grained Reconfigurable
Application-specic optimization of embedded systems becomes inevitable to satisfy the market demand for designers to meet tighter constraints on cost, performance and power. On the other hand, the exibility of a system is also important to accommodate the short time-to-market requirements for em- bedded systems. To compromise these incompatible demands, coarse-grained recongurable architecture (CGRA) has emerged as a suitable solution. A typical CGRA requires many processing elements (PEs) and a conguration cache for reconguration of its PE array. However, such a structure consumes signicant area and power. Therefore, designing cost-eective CGRA has been a serious concern for reliability of CGRA-based embedded systems.