Take SAMSUNG K9F1G08U0E for example, and use S3C2416, Windows CE5.0 platform.
要让Flash工作起来，包括两部分: Flash器件控制和CPU端的Flash控制器。Flash端一般只要把相应的脚位和CPU端连起来就可以通过CPU端的相应控制寄存器对Flash设备进行控制读写数据了。当然也有一部分CPU是不带Flash控制器的，这种情况下就要根据Flash的操作时序等进行控制了。
[1]Flash工作准备
1.确认硬件连接正常
2.确认供电正常
3.根据Flash手册的时序要求进行控制。控制都是通过对CPU的Flash控制寄存器设置实现的，所以控制Flash实际都是操作S3C2416的Flash寄存器。
4.配置CPU的Flash控制寄存器，特别要注意的是CPU里面有几个寄存器位对Flash的运行时序是有很大关联的，分别是TACLS，TWRPH0，TWRPH1。
[2]Flash的结构组织：
由Figure2可以知道，一个K9F1G08U0E设备有1024个Block(块)，1024*64个page(页)，1024＊64＊(2048＋64)Byte。
其中每页里面有分2048Byte的数据存储main区和64Byte额外信息spare区，额外的信息包括保留区／系统分区信息／ECC校验／坏块标识等，这个spare区的信息是自定义排列的，但是读写的时候一定要对应，三星里面一般会如下定义：
column address：称列地址，也称页内偏移地址， flash通过 8 bit I/O进行传输，一个地址位传输1个Byte数据, 一页有 (2K+64)Byte=2112Byte,2112(D)Byte=1000' 0100' 0000(B)Byte，这需要12 bit的地址位. 见上图的A0~A11。
row address:行地址，也称页地址，1个设备=1024 block=1024*64 page=65536(D) page=1' 0000' 0000' 000' 0000(B)page,这需要16 bit的地址位，见上图的A12~A27。
一个擦除的块数据：
Enter Block #:
Enter Page # :
rlst : 0xffc0
FMD::FMD_LB_ReadSector 0xffc0
============================================
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-------------------------------------------------------
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-------------------------------------------------------
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0x010 | e2 ea
0x020 |
0x030 |
============================================ //前面的0x000~0x7ff地址为0~2047，大小为2048Byte，是main区数据，擦除完之后全部为0xff，因为Flash只能从1变化0，不能从0变为1 //后面的0x000~0x03f数据为别为：
[1Byte] BadBlock
[4Byte] Reserved1
[1Byte] OEMReserved
[2Byte] Reserved2 [4Byte] MECC0
[4Byte] MECC1
[4Byte] MECC2
[4Byte] MECC3 [4Byte] SECC
[3] 硬件连接：
[4]Flash操作流程
Flash的操作命令：
1.
[5]S3C2416CPU的Flash控制寄存器的操作
1.关于TACLS，TWRPH0，TWRPH1，直接上图：
TACLS是Flash写命令使能和写地址使能的建立时间(setup time)，TWRPH0是读／写使能的建立时间，TWRPH1是读／写的有效时间(hold time).设置的寄存器NFCONF如下：
本系统所用的HCLK＝FCLK/3＝400M/3，HCLK＝1/(400M/3)=7.5ns而K9F1G08U0E对这三个时间的要求如下图，
所以TACLS为2，2＊7.5ns＝15>12ns，TWRPH0为1，(1＋1)＊7.5=15>12ns，TWRPH1为1，(1＋1)＊7.5=15>12ns。
2.要设置的CPU寄存器：
附录：
「1」三星Flash命名规则:
Part number description: |
K 9 X XX X X X X X - X X X X X XX |
| Move the cursor over the box to highlight particular section |
| K | Device Type | K = Memory |
| 9 | Family Descriptor | 9 = NAND Flash |
| X | Small Classification | 1 = SLC 1 Chip XD Card 2 = SLC 2 Chip XD Card 3 = 4bit MLC Mono 4 = SLC 4 Chip XD Card 5 = MLC 1 chip XD card 6 = MLC 2 chip XD card 7 = SLC moviNAND 8 = MLC moviNAND 9 = 4bit MLC ODP A = 3bit MLC MONO B = 3bit MLC DDP C = 3bit MLC QDP E = SLC Dual (S/B) F = SLC Normal G = MLC Normal H = MLC QDP J = Non-muxed One Nand K = SLC Die Normal, SLC Die stack L = MLC DDP M = MLC DSP N = SLC DSP O = 3bit MLC ODP P = MLC ODP Q = SLC ODP R = MLC 12-die stack S = MLC 6-die stack T = SLC Single (S/B) U = MLC 16-die stack W = SLC 4 Die Stack Note: SLC = Single Level Cell MLC = Multi Level Cell SM = SmartMedia S/B = Small Block |
| XX | Density | 00 = None 40 = 4Mbit 80 = 8Mbit 16 = 16Mbit 32 = 32Mbit 64 = 64Mbit 28 = 128Mbit 56 = 256Mbit 12 = 512Mbit 1G = 1Gbit 2G = 2Gbit 4G = 4Gbit 8G = 8Gbit AG = 16Gbit LG = 24Gbit BG = 32Gbit ZG = 48Gbit CG = 64Gbit NG = 96Gbit DG = 128Gbit EG, FG = 256Gbit GG = 384Gbit HG = 512Gbit |
| X | Technology | 0Normal (x8) 1 = Normal (x16) C = Catridge SIP D = DDR M = moviNAND N = moviNAND FAB P = moviMCP T = Premium eSSD Z = SSD |
| X | Organization | 0None 6 = x16 8 = x8 |
| X | Supply Voltage | 0None A = 1.65V to 3.6V B = 2.5V to 2.9V C = 4.5V to 5.5V D = 2.4V to 2.9V E = 2.3V to 3.6V R = 1.65V to 1.95V Q = 1.7V to 1.95V S = 3,0V to 3,6V / Vccq 1,65V to 1,95V T = 2.4V to 3.0V U = 2.7V to 3.6V V = 3.0V to 3.6V W = 2.7V to 5.5V, 3.0V to 5.5V |
| X | Mode | 0Normal 1 = Dual nCE & Dual R/nB 3 = Tri nCE & Tri R/nB 4 = Quad nCE & Single R/nB 5 = Quad nCE & Quad R/nB 6 = 6 nCE & 2 RnB 7 = 8 nCE & 4 RnB 8 = 8 nCE & 2RnB 9 = 1st block OTP A = Mask Option 1 L = Low grade |
| X | Generation | M = 1st generation A = 2nd generation B = 3rd generation C = 4th generation D = 5th generation E = 6th generation ... Y = 25th generation Z = 26th generation |
| X | Package Type | 8 = TSOP1 (Leed-free, halogen-free, CU) 9 = 56TSOP1 (Lead-free, halogen-free, CU) A = COB B = FBGA (Lead-free, halogen-free) D = 63-TBGA E = ISM (Lead-free, halogen-free) F = WSOP (Lead-free) G = FBGA H = BGA (Lead-free, halogen-free) I = ULGA (Lead-free) (12*17) J = FBGA (Lead-free) K = ULGA (Lead-free, halogen-free) (12*17) L = ULGA (Lead-free, halogen-free) (14*18) M = 52-ULGA (Lead-free, halogen-free) (13*18) P = TSOP1 (Lead-free) Q = TSOP2 (Lead-free) R = 56-TSOP1 (Lead-free, halogen-free) S = TSOP1 (Lead-free, halogen-free) T = WSOP (Lead-free, halogen-free) U = COB (MMC) V = WSOP W = Wafer Y = TSOP1 Z = WELP (Lead-free) |
| X | Temperature Range | C = Commercial I = Industrial S = SmartMedia B = SmartMedia BLUE 0None |
| X | Customer Bad Block | B = Include bad block D = Daisychain sample K = Special handling L = 1 to 5 bad block N = Ini. all good, add. 10 blocks S = All good block 0None (containing wafer, chip, BIZ, exception handling code) |
| X | Pre-Program Version | 0None Serial (1~9, A~Z) |
| X | Packing | T = Tape&Reel 0Other (Tray, Tube, Jar) S = Stack |
| XX | Customer („customer list reference“) |