如何在makefile指令中包含C和C ++文件

时间:2022-09-16 19:04:00

The following part is commonly found in makefiles.

以下部分通常在makefile中找到。

OBJS := $(SRCS:%.c=$(OBJDIR)/%.o)

$(OBJDIR)/%.o : %.c
    $(CC) $(DEFS) $(CFLAGS) -o$@ $<

Now my source folder contains both C and C++ files, and I want to link all object files created together using g++. But how do I specify to also also include *.cpp files to get compiled. I mean how do I modify OBJS to also include *.cpp files.

现在我的源文件夹包含C和C ++文件,我想链接使用g ++一起创建的所有目标文件。但是我如何指定还要包含* .cpp文件以进行编译。我的意思是如何修改OBJS以包含* .cpp文件。

For OBJDIR, maybe, I can do the C++ equivalent like this. I guess the makefile would guess correctly when to use CXX (g++ for C++ files) and when to use CC (gcc for C files).

对于OBJDIR,也许,我可以像这样做C ++。我想makefile会正确猜测何时使用CXX(g ++用于C ++文件)以及何时使用CC(gcc用于C文件)。

$(OBJDIR)/%.o : %.cpp
        $(CXX) $(DEFS) $(CFLAGS) -o$@ $<

But then, how do I add this rule to OBJS?

但是,如何将此规则添加到OBJS?

2 个解决方案

#1


1  

You may not need a rule for building .o files from corresponding .cpp or .c files at all, as Make comes with default rules for that, and those look a lot like what you present. The key is probably to specify which .o files need to be built in the first place.

您可能根本不需要从相应的.cpp或.c文件构建.o文件的规则,因为Make附带了默认规则,这些规则看起来很像您提供的内容。关键是可以指定首先需要构建哪些.o文件。

I often see that approached by classifying the C sources separately from the C++ sources. Then you might have something like this:

我经常看到通过将C源与C ++源分开进行分类。然后你可能会有这样的事情:

C_SRCS = ...
CPP_SRCS = ...

OBJS = $(C_SRCS:.c=.o) $(CPP_SRCS:.cpp=.o)

all: myprog

myprog: $(OBJS)
    $(CXX) $(CFLAGS) $(LDFLAGS) -o $@ $(OBJS) $(LIBS)

If you do need your own rules for building .o files from sources, then you could of course add those.

如果您确实需要自己的规则来从源构建.o文件,那么您当然可以添加这些。

Note also that the above has no dependencies on GNU make extensions, and if that's important to you then you'll want to avoid GNU style pattern rules for building the object files. That's what traditional suffix rules are for.

另请注意,上面没有依赖GNU make扩展,如果这对您很重要,那么您将需要避免构建目标文件的GNU样式模式规则。这就是传统后缀规则的用途。

#2


2  

You want to use:

你想用:

OBJS := $(addsuffix .o,$(basename $(SRCS)))

then add your pattern rule for building .o from .cpp (unless, as mentioned here, you can just use the built-in rules).

然后从.cpp添加用于构建.o的模式规则(除非,如此处所述,您可以使用内置规则)。

The above strips off the suffix, regardless of what it is, then adds .o to the end.

以上剥掉了后缀,无论它是什么,然后将.o添加到最后。

#1


1  

You may not need a rule for building .o files from corresponding .cpp or .c files at all, as Make comes with default rules for that, and those look a lot like what you present. The key is probably to specify which .o files need to be built in the first place.

您可能根本不需要从相应的.cpp或.c文件构建.o文件的规则,因为Make附带了默认规则,这些规则看起来很像您提供的内容。关键是可以指定首先需要构建哪些.o文件。

I often see that approached by classifying the C sources separately from the C++ sources. Then you might have something like this:

我经常看到通过将C源与C ++源分开进行分类。然后你可能会有这样的事情:

C_SRCS = ...
CPP_SRCS = ...

OBJS = $(C_SRCS:.c=.o) $(CPP_SRCS:.cpp=.o)

all: myprog

myprog: $(OBJS)
    $(CXX) $(CFLAGS) $(LDFLAGS) -o $@ $(OBJS) $(LIBS)

If you do need your own rules for building .o files from sources, then you could of course add those.

如果您确实需要自己的规则来从源构建.o文件,那么您当然可以添加这些。

Note also that the above has no dependencies on GNU make extensions, and if that's important to you then you'll want to avoid GNU style pattern rules for building the object files. That's what traditional suffix rules are for.

另请注意,上面没有依赖GNU make扩展,如果这对您很重要,那么您将需要避免构建目标文件的GNU样式模式规则。这就是传统后缀规则的用途。

#2


2  

You want to use:

你想用:

OBJS := $(addsuffix .o,$(basename $(SRCS)))

then add your pattern rule for building .o from .cpp (unless, as mentioned here, you can just use the built-in rules).

然后从.cpp添加用于构建.o的模式规则(除非,如此处所述,您可以使用内置规则)。

The above strips off the suffix, regardless of what it is, then adds .o to the end.

以上剥掉了后缀,无论它是什么,然后将.o添加到最后。