TI C6727外部中断的使用

时间:2022-08-15 23:29:21

TI C6727 外部中断使用

2008-10-7         Rong L

转自: http://liurongfg.blog.163.com/blog/static/277827492008978330171/

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TI C6727 没有提供专门的外部中断引脚,使用McASP AMUTEIN引脚作为外部中断引脚,利用McASPAMUTEiN事件触发dMAX,使dMAX产生相应的中断递交给CPU (可用中断:INT9,INT10,INT11,INT12,INT13,INT15)

 

详细步骤如下:

1,  配置CFGMCASPx寄存器,选择AMUTEINx引脚

可选引脚:

000 = Select the input to be a constant '0'

001 = Select the input from AXR0[7]/SPI1_CLK

010 = Select the input from AXR0[8]/AXR1[5]/SPI1_SOMI

011 = Select the input from AXR0[9]/AXR1[4]/SPI1_SIMO

100 = Select the input from AHCLKR2

101 = Select the input from SPI0_SIMO
110 = Select the input from SPI0_SCS/I2C1_SCL

111 = Select the input from SPI0_ENA/I2C1_SDA

2,  将上一步选择的相应管脚配置为GPIO 输入引脚

3,  在相应McASP模块中,禁止AMUTEIN信号驱动AMUTE输出,通过将AMUTE寄存器的INEN位清“0”来实现。

4,  配置dMAX (SPRU795d)

1)  配置DEPR寄存器,选择上升沿或下降沿触发

2)  配置DEHPRDELPR寄存器,选择高优先级或低优先级

3)  配置EVENT ENTRY,选择中断号,将其保存在对应的Param位置

4)  配置DEER寄存器,使能相应的dMAX事件

5,  配置中断(SPRU733A)

修改中断向量表,将相应中断的跳转地址改为对应的中断服务程序(也可通过程序实现),然后使能相应中断:

1)  禁止全局中断  CSR.GIE = 0

2)  使能相应中断  IER.IEn = 1

3)  使能NMI中断 IER.NMIE=1

4)  使能全局中断  CSR.GIE=1

6,  加入C6727补丁(非常重要!!)

   CMD文件或编译选择的LINKER配置中加入以下两句:

-l "c672xSystemPatchV2_00_00.lib"

-l "applySystemPatch.obj"

7ok,编译,运行,enjoy

 

CCS3.3下测试,AMUTEN0/1/2均可成功触发所有dMAX支持的中断,三个中断同时工作也正常。

 

BTW

如果需要使用CSLDSP/BIOS,可参考文献:SPRAAJ3 Configuring External Interrupts on TMS320C672x Devices及其示例

配置代码:

void ExtIRQInit(){

    /* step1configure the CFGMCASPx register to select the external pin to be used as AMUTEINx*/           

    CFGMCASP0 = 0x2; /* Select the input from AXR0[8]/AXR1[5]/SPI1_SOMI */

    CFGMCASP1 = 0x3; /* Select the input from AXR0[9]/AXR1[4]/SPI1_SIMO */

    CFGMCASP2 = 0x1; /* Select the input from AXR0[7]/SPI1_CLK */

    /* step2: configure the specific pins function as GPIO input */

    McASP_regSet(0,PFUNC,0x00000380); /* set AXR0(7),AXR0(8),AXR0(9)as GPIO*/

    McASP_regSet(0,PDIR,0x00000000); /* set AXR0(7),AXR0(8),AXR0(9)as INPUT*/

    McASP_regSet(0,AMUTE,0);

    /* step3: configure dMAX to generate a CPU interrupt */

    dMAX_init();

    /* step4: plug the ISR the the interrupt and enable the interrupt */

IRQ_setVecs(vectors); /* point to the IRQ vector table */

    IRQ_globalDisable();  /* Disable global interrupts     */

    IRQ_plug(IRQ_10,hopisr1); /* Plug the ISR to INT */

    IRQ_enable(IRQ_10);   /* Enable individual interrupt  */ 

    IRQ_plug(IRQ_11,hopisr2); /* Plug the ISR to INT */

    IRQ_enable(IRQ_11);   /* Enable individual interrupt  */ 

    IRQ_nmiEnable();      /* Enable NMI interrupt         */

    IRQ_globalEnable();   /* Enable global interrupts     */ 

}

void dMAX_init(){

    volatile  Uint32 *hdMAX;

    /* first disable all event */

    dMAX_regSet(DEDR,0xFFFFFFFF);

    dMAX_regSet(DEFR,0xFFFFFFFF);

    /* trigger an event on rising edge */

    dMAX_regSet(DEPR,(0x1<<26)|(0x1<<27)|(0x1<<28));

    /* put event into high-priority guoup */

    dMAX_regSet(DEHPR,(0x1<<26)|(0x1<<27)|(0x1<<28));

    /* define event entry */

    hdMAX = (volatile Uint32*)dMAX_EE_ADDR_HIMAX;

    hdMAX[26] = dMAX_EE_INT_RMK(dMAX_EE_INT_INT9,dMAX_EE_ETYPE_INT);

    hdMAX[27] = dMAX_EE_INT_RMK(dMAX_EE_INT_INT10,dMAX_EE_ETYPE_INT);

    hdMAX[28] = dMAX_EE_INT_RMK(dMAX_EE_INT_INT11,dMAX_EE_ETYPE_INT); 

    /* enable dMAX event */

    dMAX_regSet(DEER,(0x1<<26)|(0x1<<27)|(0x1<<28));

}


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