1、armeabi
armeabi是指的该so库用于Arm的通用CPU。
2、armeabi-v7a
v7a的CPU支持硬件浮点运算。
3、共同点
armeabi和armeabi-v7a是表示cpu的类型。
4、不同点
因此armeabi通用性强，但速度慢，而v7a能充分发挥v7a CPU的能力。armeabi就是针对普通的或旧的armcpu，armeabi-v7a是针对有浮点运算或高级扩展功能的arm cpu。
5.X86
是由Intel推出的一种复杂指令集，用于控制芯片的运行的程序，现在X86已经广泛运用到了家用PC领域
1、armeabi
----------------------------
This is the name of an ABI for ARM-based CPUs that support *at* *least* the ARMv5TE instruction set. Please refer to following documentation for more details:- ARM Architecture Reference manual (a.k.a ARMARM)
- Procedure Call Standard for the ARM Architecture (a.k.a. AAPCS)
- ELF for the ARM Architecture (a.k.a. ARMELF)
- ABI for the ARM Architecture (a.k.a. BSABI)
- Base Platform ABI for the ARM Architecture (a.k.a. BPABI)
- C Library ABI for the ARM Architecture (a.k.a. CLIABI)
- C++ ABI for the ARM Architecture (a.k.a. CPPABI)
- Runtime ABI for the ARM Architecture (a.k.a. RTABI)
- ELF System V Application Binary Interface (DRAFT - 24 April 2001)
- Generic C++ ABI (http://www.codesourcery.com/public/cxx-abi/abi.html)
Note that the AAPCS standard defines 'EABI' as a moniker used to specify a _family_ of similar but
distinct ABIs. Android follows the little-endian ARM GNU/Linux ABI as documented in the following document:
http://www.codesourcery.com/gnu_toolchains/arm/arm_gnu_linux_abi.pdf
With the exception that wchar_t is only one byte. This should not matter in practice since wchar_t is simply *not* really supported by the Android platform anyway.
This ABI does *not* support hardware-assisted floating point computations. Instead, all FP operations are performed through software helper functions that come
from the compiler's libgcc.a static library.
Thumb (a.k.a. Thumb-1) instructions are supported. Note that the NDK will generate thumb code by default, unless you define LOCAL_ARM_MODE
in your Android.mk (see docs/ANDROID-MK.html for all details).
I.2. 'armeabi-v7a'
------------------
This is the name of another ARM-based CPU ABI that *extends* 'armeabi' to include a few CPU instruction set extensions as described in the following document:
- ARM Architecture v7-a Reference Manual
The instruction extensions supported by this Android-specific ABI are:
- The Thumb-2 instruction set extension.
- The VFP hardware FPU instructions.
More specifically, VFPv3-D16 is being used, which corresponds to 16 dedicated 64-bit floating point registers provided by the CPU.
Other extensions described by the v7-a ARM like Advanced SIMD (a.k.a. NEON), VFPv3-D32 or
ThumbEE are optional to this ABI, which means that developers should check *at* *runtime* whether the extensions are available and provide
alternative code paths if this is not the case. (Just like one typically does on x86 systems to check/use MMX/SSE2/etc... specialized instructions).
You can check docs/CPU-FEATURES.html to see how to perform these runtime checks, and docs/CPU-ARM-NEON.html
to learn about the NDK's support for building NEON-capable machine code too.
IMPORTANT NOTE: This ABI enforces that all double values are passed during function calls in 'core' register pairs,
instead of dedicated FP ones. However, all internal computations can be performed with the FP registers and will be greatly sped up.
This little constraint, while resulting in a slight decrease of performance, ensures binary compatibility with all existing 'armeabi' binaries.
IMPORTANT NOTE: The 'armeabi-v7a' machine code will *not* run on ARMv5 or
ARMv6 based devices.
I.3. 'x86'
----------
This is the name of an ABI for CPUs supporting the instruction set commonly named 'x86' or 'IA-32'.
More specifically, this ABI corresponds to the following:
- instructions normally generated by GCC with the following compiler flags:
-march=i686 -msse3 -mstackrealign -mfpmath=sse
which targets Pentium Pro instruction set, according to the GCC documentation, plus the MMX, SSE, SSE2 and SSE3 instruction set extensions.
- using the standard Linux x86 32-bit calling convention (e.g. section 6, "Register Usage" of the "Calling conventions..." document below), not
the SVR4 one. The ABI does *not* include any other optional IA-32 instruction set extension, including, but not limited to:
- the MOVBE instruction - the SSSE3 "supplemental SSE3" extension - any variant of "SSE4"
You can still use these, as long as you use runtime feature probing to enable them, and provide fallbacks for devices that do not support them.
Please refer to the following documents for more details: http://gcc.gnu.org/onlinedocs/gcc/i386-and-x86_002d64-Options.html
Calling conventions for different C++ compilers and operating systems
http://www.agner.org/optimize/calling_conventions.pdf
Intel IA-32 Intel Architecture Software Developer's Manual
volume 2: Instruction Set Reference
Intel IA-32 Intel Architecture Software Developer's Manual volume 3: System Programming
Amendment to System V Application Binary Interface Intel386 Processor Architecture Supplement