STM32 - 定时器的设定 - 基础-04 - 输出波形控制 - PWM 模式

时间:2024-03-23 22:23:28

PWM的设定

Pulse Width Modulation mode allows generating a signal with a frequency determined by the value of the TIMx_ARR register and a duty cycle determined by the value of the TIMx_CCRx register.

STM32支持的PWM模式,其频率由TIMx_ARR register决定,占空比由TIMx_CCRx register.来决定。

The PWM mode can be selected independently on each channel (one PWM per OCx output) by writing ‘110’ (PWM mode 1) or ‘111’ (PWM mode 2) in the OCxM bits in the TIMx_CCMRx register.

STM32 - 定时器的设定 - 基础-04 - 输出波形控制 - PWM 模式

The corresponding preload register must be enabled by setting the OCxPE bit in the TIMx_CCMRx register,

STM32 - 定时器的设定 - 基础-04 - 输出波形控制 - PWM 模式

eventually the auto-reload preload register (in upcounting or center-aligned modes) by setting the ARPE bit in the TIMx_CR1 register.

STM32 - 定时器的设定 - 基础-04 - 输出波形控制 - PWM 模式

As the preload registers are transferred to the shadow registers only when an update event occurs, before starting the counter, the user must initialize all the registers by setting the UG bit in the TIMx_EGR register.

STM32 - 定时器的设定 - 基础-04 - 输出波形控制 - PWM 模式

STM32 - 定时器的设定 - 基础-04 - 输出波形控制 - PWM 模式


PWM 的边沿对齐模式:(PWM edge-aligned mode

Upcounting configuration

Upcounting is active when the DIR bit in the TIMx_CR1 register is low. Refer to Upcounting mode.

In the following example, we consider PWM mode 1. The reference PWM signal OCxREF is high as long as TIMx_CNT < TIMx_CCRx else it becomes low. If the compare value in TIMx_CCRx is greater than the auto-reload value (in TIMx_ARR) then OCxREF is held at ‘1’. If the compare value is 0 then OCxRef is held at ‘0’. Figure 84 shows some edge-aligned PWM waveforms in an example where

TIMx_ARR=8.

STM32 - 定时器的设定 - 基础-04 - 输出波形控制 - PWM 模式

在PWM模式1,向上计数模式,OCXREF输出比较波形在TIMx_CNT < TIMx_CCRx ,定时器计数器值小于捕捉比较的值的时候,输出为高电平,否则为低电平。如果比较值TIMx_CCRx 比定时器自动装载值TIMx_ARR要大,那么就一直维持高电平。否则低电平,CCXIF是中断标志位,在OCXREF的输出变为低的时候置位。


PWM 的中心对齐模式:(PWM center-aligned mode

Center-aligned mode is active when the CMS bits in TIMx_CR1 register are different from ‘00’ (all the remaining configurations having the same effect on the OCxRef/OCx signals).

STM32 - 定时器的设定 - 基础-04 - 输出波形控制 - PWM 模式

STM32 - 定时器的设定 - 基础-04 - 输出波形控制 - PWM 模式

The compare flag is set when the counter counts up, when it counts down or both when it counts up and down depending on the CMS bits configuration. The direction bit (DIR) in the TIMx_CR1 register is updated by hardware and must not be changed by software. Refer to Center-aligned mode (up/down counting).

Figure 85 shows some center-aligned PWM waveforms in an example where:

TIMx_ARR=8,

PWM mode is the PWM mode 1,

• The flag is set when the counter counts down corresponding to the center-aligned mode 1 selected for CMS=01 in TIMx_CR1 register.

STM32 - 定时器的设定 - 基础-04 - 输出波形控制 - PWM 模式

Hints on using center-aligned mode:

• When starting in center-aligned mode, the current up-down configuration is used. It means that the counter counts up or down depending on the value written in the DIR bit in the TIMx_CR1 register. Moreover, the DIR and CMS bits must not be changed at the

same time by the software.

• Writing to the counter while running in center-aligned mode is not recommended as it can lead to unexpected results. In particular:

– The direction is not updated if the user writes a value in the counter greater than the auto-reload value (TIMx_CNT>TIMx_ARR). For example, if the counter was counting up, it will continue to count up.

– The direction is updated if the user writes 0 or write the TIMx_ARR value in the counter but no Update Event UEV is generated.

The safest way to use center-aligned mode is to generate an update by software (setting the UG bit in the TIMx_EGR register) just before starting the counter and not to write the counter while it is running.