/*
* The pci_dev structure is used to describe PCI devices.
*/
struct pci_dev {
struct list_head bus_list;/* node in per-bus list */
struct pci_bus *bus;/* bus this device is on */
struct pci_bus *subordinate;/* bus this device bridges to */
void*sysdata;/* hook for sys-specific extension */
struct proc_dir_entry *procent;/* device entry in /proc/bus/pci */
struct pci_slot *slot;/* Physical slot this device is in */
unsignedint devfn;/* encoded device & function index */
unsignedshort vendor;
unsignedshort device;
unsignedshort subsystem_vendor;
unsignedshort subsystem_device;
unsignedintclass;/* 3 bytes: (base,sub,prog-if) */
u8 revision;/* PCI revision, low byte of class word */
u8 hdr_type;/* PCI header type (`multi' flag masked out) */
u8 pcie_cap;/* PCI-E capability offset */
u8 pcie_type;/* PCI-E device/port type */
u8 rom_base_reg;/* which config register controls the ROM */
u8 pin;/* which interrupt pin this device uses */
struct pci_driver *driver;/* which driver has allocated this device */
u64 dma_mask;/* Mask of the bits of bus address this
device implements. Normally this is
0xffffffff. You only need to change
this if your device has broken DMA
or supports 64-bit transfers. */
struct device_dma_parameters dma_parms;
pci_power_t current_state;/* Current operating state. In ACPI-speak,
this is D0-D3, D0 being fully functional,
and D3 being off. */
int pm_cap;/* PM capability offset in the
configuration space */
unsignedint pme_support:5;/* Bitmask of states from which PME#
can be generated */
unsignedint pme_interrupt:1;
unsignedint d1_support:1;/* Low power state D1 is supported */
unsignedint d2_support:1;/* Low power state D2 is supported */
unsignedint no_d1d2:1;/* Only allow D0 and D3 */
unsignedint mmio_always_on:1;/* disallow turning off io/mem
decoding during bar sizing */
unsignedint wakeup_prepared:1;
unsignedint d3_delay;/* D3->D0 transition time in ms */
#ifdef CONFIG_PCIEASPM
struct pcie_link_state *link_state;/* ASPM link state. */
#endif
pci_channel_state_t error_state;/* current connectivity state */
struct device dev;/* Generic device interface */
int cfg_size;/* Size of configuration space */
/*
* Instead of touching interrupt line and base address registers 使用储存在irq的值取代直接接触中断线和基地址寄存器。
* directly, use the values stored here. They might be different!
*/
unsignedint irq;
struct resource resource[DEVICE_COUNT_RESOURCE];/* I/O and memory regions + expansion ROMs */
resource_size_t fw_addr[DEVICE_COUNT_RESOURCE];/* FW-assigned addr */
/* These fields are used by common fixups */
unsignedint transparent:1;/* Transparent PCI bridge */
unsignedint multifunction:1;/* Part of multi-function device */
/* keep track of device state */
unsignedint is_added:1;
unsignedint is_busmaster:1;/* device is busmaster */
unsignedint no_msi:1;/* device may not use msi */
unsignedint block_ucfg_access:1;/* userspace config space access is blocked */
unsignedint broken_parity_status:1;/* Device generates false positive parity */
unsignedint irq_reroute_variant:2;/* device needs IRQ rerouting variant */
unsignedint msi_enabled:1;
unsignedint msix_enabled:1;
unsignedint ari_enabled:1;/* ARI forwarding */
unsignedint is_managed:1;
unsignedint is_pcie:1;/* Obsolete. Will be removed.
Use pci_is_pcie() instead */
unsignedint needs_freset:1;/* Dev requires fundamental reset */
unsignedint state_saved:1;
unsignedint is_physfn:1;
unsignedint is_virtfn:1;
unsignedint reset_fn:1;
unsignedint is_hotplug_bridge:1;
unsignedint __aer_firmware_first_valid:1;
unsignedint __aer_firmware_first:1;
pci_dev_flags_t dev_flags;
atomic_t enable_cnt;/* pci_enable_device has been called */
u32 saved_config_space[16];/* config space saved at suspend time */
struct hlist_head saved_cap_space;
struct bin_attribute *rom_attr;/* attribute descriptor for sysfs ROM entry */
int rom_attr_enabled;/* has display of the rom attribute been enabled? */
struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE];/* sysfs file for resources */
struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE];/* sysfs file for WC mapping of resources */
#ifdef CONFIG_PCI_MSI
struct list_head msi_list;
#endif
struct pci_vpd *vpd;
#ifdef CONFIG_PCI_IOV
union{
struct pci_sriov *sriov;/* SR-IOV capability related */
struct pci_dev *physfn;/* the PF this VF is associated with */
};
struct pci_ats *ats;/* Address Translation Service */
#endif
};
