我是imx6q-sdb的开发板,现在要增加三个串口,分别是UART2/UART4/UART5,我更改了五个文件,分别是board-mx6q_sabresd.h
、board-mx6q_sabresd.c、platform-imx-uart.c、 clock.c、mx6.h修改如下:
1.board-mx6q_sabresd.h
/*UART3*/
MX6Q_PAD_EIM_D26_UART2_TXD,
MX6Q_PAD_EIM_D27_UART2_RXD,
/*UART4*/
MX6Q_PAD_KEY_COL0_UART4_RXD,
MX6Q_PAD_KEY_ROW0_UART4_TXD,
/*UART5 */
MX6Q_PAD_KEY_COL0_UART4_RXD,
MX6Q_PAD_KEY_ROW_UART4_TXD,
2.board-mx6q_sabresd.c
static inline void mx6q_sabresd_init_uart(void)
{
imx6q_add_imx_uart(0,NULL);
imx6q_add_imx_uart(1,NULL);
imx6q_add_imx_uart(2,NULL);
imx6q_add_imx_uart(3,NULL);
imx6q_add_imx_uart(4,NULL);
}
3.platform-imx-uart.c
#define imx6q_imx_uart_data_entry(_id, _hwid)
imx_imx_uart_lirq_data_entry(MX6Q, _id, _hwid, SZ_4K)
imx6q_imx_uart_data_entry(0,1),
imx6q_imx_uart_data_entry(1,2),
imx6q_imx_uart_data_entry(2,3),
imx6q_imx_uart_data_entry(3,4),
imx6q_imx_uart_data_entry(4,5),
};
4.clock.c
_REGISTER_CLOCK("imx_uart.0", NULL, uart_clk[0]),
_REGISTER_CLOCK("imx_uart.1", NULL, uart_clk[0]),
_REGISTER_CLOCK("imx_uart.2", NULL, uart_clk[0]),
_REGISTER_CLOCK("imx_uart.3", NULL, uart_clk[0]),
_REGISTER_CLOCK("imx_uart.4", NULL, uart_clk[0]),
5.mx6.h
#define MX6Q_UART1_BASE_ADDR UART1_BASE_ADDR
#define MX6Q_UART2_BASE_ADDR UART2_BASE_ADDR
#define MX6Q_UART3_BASE_ADDR UART3_BASE_ADDR
#define MX6Q_UART4_BASE_ADDR UART4_BASE_ADDR
#define MX6Q_UART5_BASE_ADDR UART5_BASE_ADDR
#define MX6Q_INT_UART1 MXC_INT_UART1_ANDED
#define MX6Q_INT_UART2 MXC_INT_UART2_ANDED
#define MX6Q_INT_UART3 MXC_INT_UART3_ANDED
#define MX6Q_INT_UART4 MXC_INT_UART4_ANDED
#define MX6Q_INT_UART5 MXC_INT_UART5_ANDED
、board-mx6q_sabresd.c、platform-imx-uart.c、 clock.c、mx6.h修改如下:
1.board-mx6q_sabresd.h
/*UART3*/
MX6Q_PAD_EIM_D26_UART2_TXD,
MX6Q_PAD_EIM_D27_UART2_RXD,
/*UART4*/
MX6Q_PAD_KEY_COL0_UART4_RXD,
MX6Q_PAD_KEY_ROW0_UART4_TXD,
/*UART5 */
MX6Q_PAD_KEY_COL0_UART4_RXD,
MX6Q_PAD_KEY_ROW_UART4_TXD,
2.board-mx6q_sabresd.c
static inline void mx6q_sabresd_init_uart(void)
{
imx6q_add_imx_uart(0,NULL);
imx6q_add_imx_uart(1,NULL);
imx6q_add_imx_uart(2,NULL);
imx6q_add_imx_uart(3,NULL);
imx6q_add_imx_uart(4,NULL);
}
3.platform-imx-uart.c
#define imx6q_imx_uart_data_entry(_id, _hwid)
imx_imx_uart_lirq_data_entry(MX6Q, _id, _hwid, SZ_4K)
imx6q_imx_uart_data_entry(0,1),
imx6q_imx_uart_data_entry(1,2),
imx6q_imx_uart_data_entry(2,3),
imx6q_imx_uart_data_entry(3,4),
imx6q_imx_uart_data_entry(4,5),
};
4.clock.c
_REGISTER_CLOCK("imx_uart.0", NULL, uart_clk[0]),
_REGISTER_CLOCK("imx_uart.1", NULL, uart_clk[0]),
_REGISTER_CLOCK("imx_uart.2", NULL, uart_clk[0]),
_REGISTER_CLOCK("imx_uart.3", NULL, uart_clk[0]),
_REGISTER_CLOCK("imx_uart.4", NULL, uart_clk[0]),
5.mx6.h
#define MX6Q_UART1_BASE_ADDR UART1_BASE_ADDR
#define MX6Q_UART2_BASE_ADDR UART2_BASE_ADDR
#define MX6Q_UART3_BASE_ADDR UART3_BASE_ADDR
#define MX6Q_UART4_BASE_ADDR UART4_BASE_ADDR
#define MX6Q_UART5_BASE_ADDR UART5_BASE_ADDR
#define MX6Q_INT_UART1 MXC_INT_UART1_ANDED
#define MX6Q_INT_UART2 MXC_INT_UART2_ANDED
#define MX6Q_INT_UART3 MXC_INT_UART3_ANDED
#define MX6Q_INT_UART4 MXC_INT_UART4_ANDED
#define MX6Q_INT_UART5 MXC_INT_UART5_ANDED