FPGA學習筆記(貳)--- 流水燈

时间:2022-04-17 08:46:58

平臺:FPGA黑金开发板 AX301

FPGA學習筆記(貳)--- 流水燈

開發環境:Quartus Prime Version 17.0.0 Build 595 04/25/2017 Standard Edition

FPGA學習筆記(貳)--- 流水燈

引脚配置:鼠標托拉 Node Name 項到引脚圖即可

FPGA學習筆記(貳)--- 流水燈

注意事項新建工程:Set Up Top-Level Entity 名字要對應

FPGA學習筆記(貳)--- 流水燈

注意事項引脚復用:Assignments-->Device-->Device and Pin Options...-->Dual-Purpose pins-->nCEO -->Use as regular I/O

nCEO:Specifies how the nCEO pin should be used when the device is operating in user mode after configuration is complete. The nCEO pin can be reserved as dedicated nCEO programming pin or a regular I/O pin.

FPGA學習筆記(貳)--- 流水燈

我的Top-Level:

 module MyLED(CLK, RSTn, Run_LED);

     input CLK;
input RSTn;
output [:]Run_LED;//I/O口的说明:input[信号位宽]端口名 /**********************************/ wire [:]Run_LED;//定义输出信号 Run_LED U1(.CLK( CLK ), .RSTn( RSTn ), .LED_Out( Run_LED ) ); /***********************************/ assign Run_LED = Run_LED;//内部信号声明和功能定义 /**********************************/ endmodule

我的Run_LED:

 module Run_LED(CLK, RSTn, LED_Out);

      input CLK;
input RSTn;
output [:]LED_Out; /**************************/ parameter T1MS = 'd49_999; //DB4CE15使用的晶振为50MHz,50M*0.001-1=49_999 /**************************/ reg [:]Count1; always @ ( posedge CLK or negedge RSTn )//1ms计数器
if( !RSTn )
Count1 <= 'd0;
else if( Count1 == T1MS )
Count1 <= 'd0;
else
Count1 <= Count1 + 'b1; /*****************************************/ reg [:]Count_MS; always @ ( posedge CLK or negedge RSTn )//100ms计数器
if( !RSTn )
Count_MS <= 'd0;
else if( Count_MS == 'd100 )
Count_MS <= 'd0;
else if( Count1 == T1MS )
Count_MS <= Count_MS + 'b1; /***************************************/ reg [:]rLED_Out; always @ ( posedge CLK or negedge RSTn )
if( !RSTn )
rLED_Out <= 'b1111;
else if( Count_MS == 'd100 )
begin if( rLED_Out == 'b0000 )
rLED_Out <= 'b0001;
else
rLED_Out <= { rLED_Out[:], 'b0 };//向左移位1bit操作
end /**********************行48左移操作解釋***************************
知識點1: reg [n-1:0] rega; //一个n位的寄存器
reg mema [n-1:0]; //一个由n个1位寄存器构成的存储器组 知識點2: 位拼接运算符(Concatation) {}

解釋:如果rLED_Out不是4'b0000 就取rLED_Out后三位,并且與1'b0合并成一个新的四位 ****************************************************************/ assign LED_Out = rLED_Out; /*****************************/
endmodule

感謝:http://www.heijin.org/forum.php?mod=viewthread&tid=31002&pid=320054&page=1&extra=#pid320054