它的指示臂总成。

时间:2022-07-04 03:13:25

I've got the following ARM assembly code.

我有下面的ARM汇编代码。

CMP             R0, #0
ITT EQ
MOVEQ           R0, #0x7FFFFFFF
BXEQ            LR

Firstly, why is the EQ needed after the MOV and BX instructions? The ARM reference says that the condition (EQ) after the ITT will be applied to the first instruction (MOV) in the IT block and then because of the second T in ITT the EQ will be applied to the second instruction (BX) in the IT block. So if the ITT is applying the EQ, why is the EQ needed in MOVEQ and BXEQ?

首先,为什么在MOV和BX指令之后需要EQ ?ARM引用说,ITT之后的条件(EQ)将被应用到IT块的第一个指令(MOV)中,然后由于ITT中的第二个T, EQ将应用于IT块中的第二个指令(BX)。如果ITT在应用EQ,为什么在MOVEQ和BXEQ中需要EQ?

Secondly, why is the IT instruction needed at all? Why not just have:

其次,为什么需要IT指令?为什么不有:

CMP             R0, #0
MOVEQ           R0, #0x7FFFFFFF
BXEQ            LR

It's MOV not MOVS so the flags won't be updated and the EQ in BXEQ will still be "referring" to the flag values set by the CMP.

它是MOV而不是MOVS,因此标志不会更新,而BXEQ中的EQ仍然会“引用”CMP设置的标志值。

3 个解决方案

#1


12  

Why dont you just try it?

你为什么不试试呢?

.cpu cortex-m3
.thumb
.syntax unified

    CMP             R0, #0
    ITT EQ
    MOVEQ           R0, #0x7FFFFFFF
    BXEQ            LR


    CMP             R0, #0
    MOVEQ           R0, #0x7FFFFFFF
    BXEQ            LR

first try

第一次尝试

arm-none-eabi-as vectors.s -o vectors.o
vectors.s: Assembler messages:
vectors.s:13: Error: thumb conditional instruction should be in IT block -- `moveq R0,#0x7FFFFFFF'
vectors.s:14: Error: thumb conditional instruction should be in IT block -- `bxeq LR'
make: *** [vectors.o] Error 1

Which is obvious because there are no conditional versions of those instructions in thumb mode.

这是显而易见的,因为在拇指模式中没有这些指令的条件版本。

so that leaves:

所以这使得:

.cpu cortex-m3
.thumb
.syntax unified

    CMP             R0, #0
    ITT EQ
    MOVEQ           R0, #0x7FFFFFFF
    BXEQ            LR

which the tools are happy with

哪些工具是快乐的?

   0:   2800        cmp r0, #0
   2:   bf04        itt eq
   4:   f06f 4000   mvneq.w r0, #2147483648 ; 0x80000000
   8:   4770        bxeq    lr

so we try without the eq

所以我们尝试没有eq。

.cpu cortex-m3
.thumb
.syntax unified

    CMP             R0, #0
    ITT EQ
    MOV           R0, #0x7FFFFFFF
    BX            LR

not happy

不高兴

vectors.s:8: Error: instruction not allowed in IT block -- `mov R0,#0x7FFFFFFF'
vectors.s:9: Error: incorrect condition in IT block -- `bx LR'

I think it must be just a syntax thing to help you out and make sure that you get what you really wanted.

我想这一定是一种语法帮助你,确保你得到你真正想要的。

.cpu cortex-m3
.thumb
.syntax unified

    CMP             R0, #0
    IT EQ
    MOVEQ           R0, #0x7FFFFFFF
    BX            LR

gives

给了

   0:   2800        cmp r0, #0
   2:   bf08        it  eq
   4:   f06f 4000   mvneq.w r0, #2147483648 ; 0x80000000
   8:   4770        bx  lr

Notice the bx lr is the same instruction 0x4770, the eq on the end or not on the end seems clearly there as an assembler syntax thing to help you out and make sure you get the right number of instructions tied to the If Then instruction. (which you can see did change between having one conditional instruction and two conditional instructions).

注意,bx lr是相同的指令0x4770,在末端的eq看起来很明显,作为一个汇编程序语法,它可以帮助你,并确保你得到正确的指令数,与If Then指令绑定在一起。(你可以看到有一个条件指令和两个条件指令之间的变化)。

I do find it bothersome

我确实觉得有点麻烦。

.cpu cortex-m3
.thumb
.syntax unified

    CMP             R0, #0
    IT EQ
    MOVSEQ           R0, #0x7
    BX            LR

    movs r0,#7
    mov r0,#7
    movs.w r0,#7

that in this case the thumb2 extension is used

在本例中,使用了thumb2扩展。

00000000 <.text>:
   0:   2800        cmp r0, #0
   2:   bf08        it  eq
   4:   f05f 0007   movseq.w    r0, #7
   8:   4770        bx  lr
   a:   2007        movs    r0, #7
   c:   f04f 0007   mov.w   r0, #7
  10:   f05f 0007   movs.w  r0, #7

that is a curiosity.

这是一个好奇心。

The reason it is needed at all is obvious from the instruction set documentation. Full blown arm instructions have a 4 bit conditional field on every instruction. thumb instructions do not. At first you simply did the traditional branch on condition to avoid instructions, thumb didnt offer the ARM feature of every instruction being conditional and not needing to flush the pipe. So according to the docs they added the If Then (IT) instruction with ARMv7-M, and as stated in those docs this allows you to make up to four instructions following the if then to become conditional. The above syntax game I believe (have no proof other than it just appears to be so) is there to help on the human error.

从指令集文档中可以明显看出它的必要性。全吹臂指令在每个指令上有一个4位的条件字段。拇指不指令。一开始,你只是简单地做了传统的分支,以避免指令,拇指没有提供每条指令的手臂特征是有条件的,不需要冲洗管道。根据文档,他们添加了If Then (IT)指令,使用ARMv7-M,在这些文档中,这允许您在If Then变为条件的情况下,完成4条指令。我认为上面的语法游戏(没有其他证据,只是看起来是这样)是为了帮助人类的错误。

Now if not in thumb mode then you absolutely can just apply the conditional to the instruction

如果不是在拇指模式下,那么你完全可以将条件应用到指令上。

.syntax unified

    CMP             R0, #0
    MOVSEQ           R0, #0x7
    BXEQ            LR

    movs r0,#7
    mov r0,#7

gives

给了

00000000 <.text>:
   0:   e3500000    cmp r0, #0
   4:   03b00007    movseq  r0, #7
   8:   012fff1e    bxeq    lr
   c:   e3b00007    movs    r0, #7
  10:   e3a00007    mov r0, #7

and maybe this is the root of your question, but it is very possible that the assembler could just insert the IT instruction for you, but assembly language has a desire to be one to one (despite all the pseudo instructions for all the processors that are out there) so I guess they expect you to explicitly show you want that If Then instruction there and/or that you are going to have an If Then instruction there. The assembler is also helping you by saying you need to use an IT block rather than simply saying it is an invalid instruction.

,也许这是你的问题的根源,但它很可能汇编可以插入你的指令,但汇编语言想要一对一(尽管所有伪指令的处理器)所以我猜他们希望你明确显示你想要的,如果那么指令和/或你要有一个如果指令。汇编程序还帮助您说,您需要使用一个IT块,而不是简单地说它是一个无效的指令。

One further experiment

另外一个实验

.cpu arm7t
.thumb
.syntax unified

    CMP             R0, #0
    MOVSEQ           R0, #0x7
    BX            LR

    movs r0,#7

Is bothersome because if you leave the IT in there it knows that is wrong:

麻烦的是,如果你把它留在那里它就会知道这是错的:

vectors.s:7: Error: selected processor does not support Thumb mode `it EQ'

but then in the same breath it says

但同时它又说。

vectors.s:7: Error: thumb conditional instruction should be in IT block -- `movseq R0,#0x7'

#2


9  

The ARMv7-A and ARMv7-M edition of the ARM Architecture Reference (A4.2.1 "Conditional instructions) says this:

ARMv7-A和ARMv7-M版本的ARM架构参考(A4.2.1“条件指令”)说:

Although other Thumb instructions are unconditional, all instructions that are made conditional by an IT instruction must be written with a condition. These conditions must match the conditions imposed by the IT instruction. For example, an ITTEE EQ instruction imposes the EQ condition on the first two following instructions, and the NE condition on the next two. Those four instructions must be written with EQ, EQ, NE and NE conditions respectively.

虽然其他的拇指指令是无条件的,但所有的指令都是有条件的,必须用一个条件来写。这些条件必须符合IT指令所规定的条件。例如,一个ITTEE EQ指令在前两个指令中施加了EQ条件,然后在接下来的两个指令中设置了NE条件。这四个指示必须分别用EQ, EQ, NE和NE来写。

I agree with dwelch that it's likely specified this way to help reduce programming errors, as the condition code isn't encoded in the machine opcode.

我同意live的观点,它很可能指定了这种方法来帮助减少编程错误,因为条件代码没有在机器操作码中编码。

Also, for the purpose of the 'unified assembler language' (where the same assembly mnemonics can be used for either 32-bit ARM or Thumb modes), the opposite is done in ARM mode. The IT instructions are checked for consistency with the conditional instructions that follow even though there is no machine opcode generated for the IT instruction:

此外,为了“统一汇编语言”(在这里,相同的汇编助记符可以用于32位的ARM或拇指模式),相反的是在ARM模式下完成。即使没有为IT指令生成机器操作码,它也会检查IT指令是否与后续的条件指令保持一致。

For maximum portability of UAL assembly language between the ARM and Thumb instruction sets, ARM recommends that:

为了最大限度的可移植性,在手臂和拇指指令集之间,ARM建议:

  • IT instructions are written before conditional instructions in the correct way for the Thumb instruction set.

    它的指令是在条件指令之前用正确的方式编写的拇指指令集。

  • When assembling to the ARM instruction set, assemblers check that any IT instructions are correct, but do not generate any code for them.

    当装配到ARM指令集时,汇编器检查任何IT指令是否正确,但不为它们生成任何代码。

#3


2  

You need the IT instruction in thumb mode, where condition bits are not available in the instructions otherwise. Your first example is most probably thumb code and not ARM mode.

您需要在拇指模式下使用IT指令,否则在指令中没有条件位。您的第一个示例很可能是拇指代码,而不是ARM模式。

why is the EQ needed in MOVEQ and BXEQ?

为什么在MOVEQ和BXEQ中需要EQ?

You can use the inverse condition in an IT block. I think it is also easier to read this way.

你可以用它的逆条件。我认为这样更容易理解。

#1


12  

Why dont you just try it?

你为什么不试试呢?

.cpu cortex-m3
.thumb
.syntax unified

    CMP             R0, #0
    ITT EQ
    MOVEQ           R0, #0x7FFFFFFF
    BXEQ            LR


    CMP             R0, #0
    MOVEQ           R0, #0x7FFFFFFF
    BXEQ            LR

first try

第一次尝试

arm-none-eabi-as vectors.s -o vectors.o
vectors.s: Assembler messages:
vectors.s:13: Error: thumb conditional instruction should be in IT block -- `moveq R0,#0x7FFFFFFF'
vectors.s:14: Error: thumb conditional instruction should be in IT block -- `bxeq LR'
make: *** [vectors.o] Error 1

Which is obvious because there are no conditional versions of those instructions in thumb mode.

这是显而易见的,因为在拇指模式中没有这些指令的条件版本。

so that leaves:

所以这使得:

.cpu cortex-m3
.thumb
.syntax unified

    CMP             R0, #0
    ITT EQ
    MOVEQ           R0, #0x7FFFFFFF
    BXEQ            LR

which the tools are happy with

哪些工具是快乐的?

   0:   2800        cmp r0, #0
   2:   bf04        itt eq
   4:   f06f 4000   mvneq.w r0, #2147483648 ; 0x80000000
   8:   4770        bxeq    lr

so we try without the eq

所以我们尝试没有eq。

.cpu cortex-m3
.thumb
.syntax unified

    CMP             R0, #0
    ITT EQ
    MOV           R0, #0x7FFFFFFF
    BX            LR

not happy

不高兴

vectors.s:8: Error: instruction not allowed in IT block -- `mov R0,#0x7FFFFFFF'
vectors.s:9: Error: incorrect condition in IT block -- `bx LR'

I think it must be just a syntax thing to help you out and make sure that you get what you really wanted.

我想这一定是一种语法帮助你,确保你得到你真正想要的。

.cpu cortex-m3
.thumb
.syntax unified

    CMP             R0, #0
    IT EQ
    MOVEQ           R0, #0x7FFFFFFF
    BX            LR

gives

给了

   0:   2800        cmp r0, #0
   2:   bf08        it  eq
   4:   f06f 4000   mvneq.w r0, #2147483648 ; 0x80000000
   8:   4770        bx  lr

Notice the bx lr is the same instruction 0x4770, the eq on the end or not on the end seems clearly there as an assembler syntax thing to help you out and make sure you get the right number of instructions tied to the If Then instruction. (which you can see did change between having one conditional instruction and two conditional instructions).

注意,bx lr是相同的指令0x4770,在末端的eq看起来很明显,作为一个汇编程序语法,它可以帮助你,并确保你得到正确的指令数,与If Then指令绑定在一起。(你可以看到有一个条件指令和两个条件指令之间的变化)。

I do find it bothersome

我确实觉得有点麻烦。

.cpu cortex-m3
.thumb
.syntax unified

    CMP             R0, #0
    IT EQ
    MOVSEQ           R0, #0x7
    BX            LR

    movs r0,#7
    mov r0,#7
    movs.w r0,#7

that in this case the thumb2 extension is used

在本例中,使用了thumb2扩展。

00000000 <.text>:
   0:   2800        cmp r0, #0
   2:   bf08        it  eq
   4:   f05f 0007   movseq.w    r0, #7
   8:   4770        bx  lr
   a:   2007        movs    r0, #7
   c:   f04f 0007   mov.w   r0, #7
  10:   f05f 0007   movs.w  r0, #7

that is a curiosity.

这是一个好奇心。

The reason it is needed at all is obvious from the instruction set documentation. Full blown arm instructions have a 4 bit conditional field on every instruction. thumb instructions do not. At first you simply did the traditional branch on condition to avoid instructions, thumb didnt offer the ARM feature of every instruction being conditional and not needing to flush the pipe. So according to the docs they added the If Then (IT) instruction with ARMv7-M, and as stated in those docs this allows you to make up to four instructions following the if then to become conditional. The above syntax game I believe (have no proof other than it just appears to be so) is there to help on the human error.

从指令集文档中可以明显看出它的必要性。全吹臂指令在每个指令上有一个4位的条件字段。拇指不指令。一开始,你只是简单地做了传统的分支,以避免指令,拇指没有提供每条指令的手臂特征是有条件的,不需要冲洗管道。根据文档,他们添加了If Then (IT)指令,使用ARMv7-M,在这些文档中,这允许您在If Then变为条件的情况下,完成4条指令。我认为上面的语法游戏(没有其他证据,只是看起来是这样)是为了帮助人类的错误。

Now if not in thumb mode then you absolutely can just apply the conditional to the instruction

如果不是在拇指模式下,那么你完全可以将条件应用到指令上。

.syntax unified

    CMP             R0, #0
    MOVSEQ           R0, #0x7
    BXEQ            LR

    movs r0,#7
    mov r0,#7

gives

给了

00000000 <.text>:
   0:   e3500000    cmp r0, #0
   4:   03b00007    movseq  r0, #7
   8:   012fff1e    bxeq    lr
   c:   e3b00007    movs    r0, #7
  10:   e3a00007    mov r0, #7

and maybe this is the root of your question, but it is very possible that the assembler could just insert the IT instruction for you, but assembly language has a desire to be one to one (despite all the pseudo instructions for all the processors that are out there) so I guess they expect you to explicitly show you want that If Then instruction there and/or that you are going to have an If Then instruction there. The assembler is also helping you by saying you need to use an IT block rather than simply saying it is an invalid instruction.

,也许这是你的问题的根源,但它很可能汇编可以插入你的指令,但汇编语言想要一对一(尽管所有伪指令的处理器)所以我猜他们希望你明确显示你想要的,如果那么指令和/或你要有一个如果指令。汇编程序还帮助您说,您需要使用一个IT块,而不是简单地说它是一个无效的指令。

One further experiment

另外一个实验

.cpu arm7t
.thumb
.syntax unified

    CMP             R0, #0
    MOVSEQ           R0, #0x7
    BX            LR

    movs r0,#7

Is bothersome because if you leave the IT in there it knows that is wrong:

麻烦的是,如果你把它留在那里它就会知道这是错的:

vectors.s:7: Error: selected processor does not support Thumb mode `it EQ'

but then in the same breath it says

但同时它又说。

vectors.s:7: Error: thumb conditional instruction should be in IT block -- `movseq R0,#0x7'

#2


9  

The ARMv7-A and ARMv7-M edition of the ARM Architecture Reference (A4.2.1 "Conditional instructions) says this:

ARMv7-A和ARMv7-M版本的ARM架构参考(A4.2.1“条件指令”)说:

Although other Thumb instructions are unconditional, all instructions that are made conditional by an IT instruction must be written with a condition. These conditions must match the conditions imposed by the IT instruction. For example, an ITTEE EQ instruction imposes the EQ condition on the first two following instructions, and the NE condition on the next two. Those four instructions must be written with EQ, EQ, NE and NE conditions respectively.

虽然其他的拇指指令是无条件的,但所有的指令都是有条件的,必须用一个条件来写。这些条件必须符合IT指令所规定的条件。例如,一个ITTEE EQ指令在前两个指令中施加了EQ条件,然后在接下来的两个指令中设置了NE条件。这四个指示必须分别用EQ, EQ, NE和NE来写。

I agree with dwelch that it's likely specified this way to help reduce programming errors, as the condition code isn't encoded in the machine opcode.

我同意live的观点,它很可能指定了这种方法来帮助减少编程错误,因为条件代码没有在机器操作码中编码。

Also, for the purpose of the 'unified assembler language' (where the same assembly mnemonics can be used for either 32-bit ARM or Thumb modes), the opposite is done in ARM mode. The IT instructions are checked for consistency with the conditional instructions that follow even though there is no machine opcode generated for the IT instruction:

此外,为了“统一汇编语言”(在这里,相同的汇编助记符可以用于32位的ARM或拇指模式),相反的是在ARM模式下完成。即使没有为IT指令生成机器操作码,它也会检查IT指令是否与后续的条件指令保持一致。

For maximum portability of UAL assembly language between the ARM and Thumb instruction sets, ARM recommends that:

为了最大限度的可移植性,在手臂和拇指指令集之间,ARM建议:

  • IT instructions are written before conditional instructions in the correct way for the Thumb instruction set.

    它的指令是在条件指令之前用正确的方式编写的拇指指令集。

  • When assembling to the ARM instruction set, assemblers check that any IT instructions are correct, but do not generate any code for them.

    当装配到ARM指令集时,汇编器检查任何IT指令是否正确,但不为它们生成任何代码。

#3


2  

You need the IT instruction in thumb mode, where condition bits are not available in the instructions otherwise. Your first example is most probably thumb code and not ARM mode.

您需要在拇指模式下使用IT指令,否则在指令中没有条件位。您的第一个示例很可能是拇指代码,而不是ARM模式。

why is the EQ needed in MOVEQ and BXEQ?

为什么在MOVEQ和BXEQ中需要EQ?

You can use the inverse condition in an IT block. I think it is also easier to read this way.

你可以用它的逆条件。我认为这样更容易理解。